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128b2c383c
SelectionDAG::isConsecutiveLoad() was not detecting consecutive loads when the first load was offset from a base address. This patch recognizes that pattern and subtracts the offset before comparing the second load to see if it is consecutive. The codegen change in the new test case improves from: vmovsd 32(%rdi), %xmm0 vmovsd 48(%rdi), %xmm1 vmovhpd 56(%rdi), %xmm1, %xmm1 vmovhpd 40(%rdi), %xmm0, %xmm0 vinsertf128 $1, %xmm1, %ymm0, %ymm0 To: vmovups 32(%rdi), %ymm0 An existing test case is also improved from: vmovsd (%rdi), %xmm0 vmovsd 16(%rdi), %xmm1 vmovsd 24(%rdi), %xmm2 vunpcklpd %xmm2, %xmm0, %xmm0 ## xmm0 = xmm0[0],xmm2[0] vmovhpd 8(%rdi), %xmm1, %xmm3 To: vmovsd (%rdi), %xmm0 vmovsd 16(%rdi), %xmm1 vmovhpd 24(%rdi), %xmm0, %xmm0 vmovhpd 8(%rdi), %xmm1, %xmm1 This patch fixes PR21771 ( http://llvm.org/bugs/show_bug.cgi?id=21771 ). Differential Revision: http://reviews.llvm.org/D6642 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224379 91177308-0d34-0410-b5e6-96231b3b80d8
38 lines
1.5 KiB
LLVM
38 lines
1.5 KiB
LLVM
; RUN: llc < %s -mcpu=corei7-avx -mtriple=x86_64-linux | FileCheck %s
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; CHECK-LABEL: cftx020:
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; CHECK: vmovsd (%rdi), %xmm{{.*}}
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; CHECK-NEXT: vmovsd 16(%rdi), %xmm{{.*}}
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; CHECK-NEXT: vmovhpd 24(%rdi), %xmm{{.*}}
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; CHECK-NEXT: vmovhpd 8(%rdi), %xmm{{.*}}
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; CHECK: vmovupd %xmm{{.*}}, (%rdi)
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; CHECK-NEXT: vmovupd %xmm{{.*}}, 16(%rdi)
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; CHECK: ret
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; A test from pifft (after SLP-vectorization) that fails when we drop the chain on newly merged loads.
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define void @cftx020(double* nocapture %a) {
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entry:
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%0 = load double* %a, align 8
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%arrayidx1 = getelementptr inbounds double* %a, i64 2
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%1 = load double* %arrayidx1, align 8
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%arrayidx2 = getelementptr inbounds double* %a, i64 1
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%2 = load double* %arrayidx2, align 8
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%arrayidx3 = getelementptr inbounds double* %a, i64 3
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%3 = load double* %arrayidx3, align 8
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%4 = insertelement <2 x double> undef, double %0, i32 0
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%5 = insertelement <2 x double> %4, double %3, i32 1
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%6 = insertelement <2 x double> undef, double %1, i32 0
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%7 = insertelement <2 x double> %6, double %2, i32 1
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%8 = fadd <2 x double> %5, %7
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%9 = bitcast double* %a to <2 x double>*
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store <2 x double> %8, <2 x double>* %9, align 8
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%10 = insertelement <2 x double> undef, double %0, i32 0
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%11 = insertelement <2 x double> %10, double %2, i32 1
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%12 = insertelement <2 x double> undef, double %1, i32 0
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%13 = insertelement <2 x double> %12, double %3, i32 1
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%14 = fsub <2 x double> %11, %13
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%15 = bitcast double* %arrayidx1 to <2 x double>*
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store <2 x double> %14, <2 x double>* %15, align 8
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ret void
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}
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