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https://github.com/c64scene-ar/llvm-6502.git
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3ba85ab23a
Patch to allow (v)pclmulqdq to be commuted - swaps the src registers and inverts the immediate (low/high) src mask. Differential Revision: http://reviews.llvm.org/D7180 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227141 91177308-0d34-0410-b5e6-96231b3b80d8
61 lines
1.8 KiB
LLVM
61 lines
1.8 KiB
LLVM
; RUN: llc -O3 -mtriple=x86_64-unknown -mcpu=x86-64 -mattr=+sse2,+pclmul < %s | FileCheck %s --check-prefix=SSE
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; RUN: llc -O3 -mtriple=x86_64-unknown -mcpu=x86-64 -mattr=+avx2,+pclmul < %s | FileCheck %s --check-prefix=AVX
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declare <2 x i64> @llvm.x86.pclmulqdq(<2 x i64>, <2 x i64>, i8) nounwind readnone
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define <2 x i64> @commute_lq_lq(<2 x i64>* %a0, <2 x i64> %a1) #0 {
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;SSE-LABEL: commute_lq_lq
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;SSE: pclmulqdq $0, (%rdi), %xmm0
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;SSE-NEXT: retq
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;AVX-LABEL: commute_lq_lq
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;AVX: vpclmulqdq $0, (%rdi), %xmm0, %xmm0
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;AVX-NEXT: retq
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%1 = load <2 x i64>* %a0
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%2 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %1, <2 x i64> %a1, i8 0)
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ret <2 x i64> %2
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}
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define <2 x i64> @commute_lq_hq(<2 x i64>* %a0, <2 x i64> %a1) #0 {
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;SSE-LABEL: commute_lq_hq
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;SSE: pclmulqdq $1, (%rdi), %xmm0
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;SSE-NEXT: retq
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;AVX-LABEL: commute_lq_hq
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;AVX: vpclmulqdq $1, (%rdi), %xmm0, %xmm0
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;AVX-NEXT: retq
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%1 = load <2 x i64>* %a0
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%2 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %1, <2 x i64> %a1, i8 16)
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ret <2 x i64> %2
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}
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define <2 x i64> @commute_hq_lq(<2 x i64>* %a0, <2 x i64> %a1) #0 {
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;SSE-LABEL: commute_hq_lq
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;SSE: pclmulqdq $16, (%rdi), %xmm0
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;SSE-NEXT: retq
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;AVX-LABEL: commute_hq_lq
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;AVX: vpclmulqdq $16, (%rdi), %xmm0, %xmm0
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;AVX-NEXT: retq
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%1 = load <2 x i64>* %a0
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%2 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %1, <2 x i64> %a1, i8 1)
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ret <2 x i64> %2
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}
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define <2 x i64> @commute_hq_hq(<2 x i64>* %a0, <2 x i64> %a1) #0 {
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;SSE-LABEL: commute_hq_hq
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;SSE: pclmulqdq $17, (%rdi), %xmm0
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;SSE-NEXT: retq
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;AVX-LABEL: commute_hq_hq
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;AVX: vpclmulqdq $17, (%rdi), %xmm0, %xmm0
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;AVX-NEXT: retq
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%1 = load <2 x i64>* %a0
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%2 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %1, <2 x i64> %a1, i8 17)
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ret <2 x i64> %2
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}
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