mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-16 11:30:51 +00:00
7bc8414ee9
Only Linux is supported at the moment, and other platforms quickly fault. As a result these tests would fail on non-Linux hosts. It may be worth making the tests more generic again as more platforms are supported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174170 91177308-0d34-0410-b5e6-96231b3b80d8
125 lines
4.9 KiB
LLVM
125 lines
4.9 KiB
LLVM
; RUN: llc -mtriple=aarch64-none-linux-gnu -relocation-model=pic < %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-none-linux-gnu -relocation-model=pic -filetype=obj < %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-ELF %s
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@var_simple = hidden global i32 0
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@var_got = global i32 0
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@var_tlsgd = thread_local global i32 0
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@var_tlsld = thread_local(localdynamic) global i32 0
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@var_tlsie = thread_local(initialexec) global i32 0
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@var_tlsle = thread_local(localexec) global i32 0
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define void @test_inline_modifier_L() nounwind {
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; CHECK: test_inline_modifier_L:
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call void asm sideeffect "add x0, x0, ${0:L}", "S,~{x0}"(i32* @var_simple)
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call void asm sideeffect "ldr x0, [x0, ${0:L}]", "S,~{x0}"(i32* @var_got)
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call void asm sideeffect "add x0, x0, ${0:L}", "S,~{x0}"(i32* @var_tlsgd)
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call void asm sideeffect "add x0, x0, ${0:L}", "S,~{x0}"(i32* @var_tlsld)
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call void asm sideeffect "ldr x0, [x0, ${0:L}]", "S,~{x0}"(i32* @var_tlsie)
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call void asm sideeffect "add x0, x0, ${0:L}", "S,~{x0}"(i32* @var_tlsle)
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; CHECK: add x0, x0, #:lo12:var_simple
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; CHECK: ldr x0, [x0, #:got_lo12:var_got]
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; CHECK: add x0, x0, #:tlsdesc_lo12:var_tlsgd
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; CHECK: add x0, x0, #:dtprel_lo12:var_tlsld
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; CHECK: ldr x0, [x0, #:gottprel_lo12:var_tlsie]
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; CHECK: add x0, x0, #:tprel_lo12:var_tlsle
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; CHECK-ELF: R_AARCH64_ADD_ABS_LO12_NC var_simple
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; CHECK-ELF: R_AARCH64_LD64_GOT_LO12_NC var_got
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; CHECK-ELF: R_AARCH64_TLSDESC_ADD_LO12_NC var_tlsgd
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; CHECK-ELF: R_AARCH64_TLSLD_ADD_DTPREL_LO12 var_tlsld
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; CHECK-ELF: R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC var_tlsie
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; CHECK-ELF: R_AARCH64_TLSLE_ADD_TPREL_LO12 var_tlsle
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ret void
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}
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define void @test_inline_modifier_G() nounwind {
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; CHECK: test_inline_modifier_G:
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call void asm sideeffect "add x0, x0, ${0:G}, lsl #12", "S,~{x0}"(i32* @var_tlsld)
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call void asm sideeffect "add x0, x0, ${0:G}, lsl #12", "S,~{x0}"(i32* @var_tlsle)
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; CHECK: add x0, x0, #:dtprel_hi12:var_tlsld, lsl #12
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; CHECK: add x0, x0, #:tprel_hi12:var_tlsle, lsl #12
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; CHECK-ELF: R_AARCH64_TLSLD_ADD_DTPREL_HI12 var_tlsld
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; CHECK-ELF: R_AARCH64_TLSLE_ADD_TPREL_HI12 var_tlsle
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ret void
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}
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define void @test_inline_modifier_A() nounwind {
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; CHECK: test_inline_modifier_A:
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call void asm sideeffect "adrp x0, ${0:A}", "S,~{x0}"(i32* @var_simple)
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call void asm sideeffect "adrp x0, ${0:A}", "S,~{x0}"(i32* @var_got)
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call void asm sideeffect "adrp x0, ${0:A}", "S,~{x0}"(i32* @var_tlsgd)
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call void asm sideeffect "adrp x0, ${0:A}", "S,~{x0}"(i32* @var_tlsie)
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; N.b. All tprel and dtprel relocs are modified: lo12 or granules.
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; CHECK: adrp x0, var_simple
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; CHECK: adrp x0, :got:var_got
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; CHECK: adrp x0, :tlsdesc:var_tlsgd
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; CHECK: adrp x0, :gottprel:var_tlsie
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; CHECK-ELF: R_AARCH64_ADR_PREL_PG_HI21 var_simple
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; CHECK-ELF: R_AARCH64_ADR_GOT_PAGE var_got
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; CHECK-ELF: R_AARCH64_TLSDESC_ADR_PAGE var_tlsgd
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; CHECK-ELF: R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 var_tlsie
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ret void
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}
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define void @test_inline_modifier_wx(i32 %small, i64 %big) nounwind {
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; CHECK: test_inline_modifier_wx:
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call i32 asm sideeffect "add $0, $0, $0", "=r,0"(i32 %small)
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call i32 asm sideeffect "add ${0:w}, ${0:w}, ${0:w}", "=r,0"(i32 %small)
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call i32 asm sideeffect "add ${0:x}, ${0:x}, ${0:x}", "=r,0"(i32 %small)
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; CHECK: //APP
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; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
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; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
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; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
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call i64 asm sideeffect "add $0, $0, $0", "=r,0"(i64 %big)
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call i64 asm sideeffect "add ${0:w}, ${0:w}, ${0:w}", "=r,0"(i64 %big)
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call i64 asm sideeffect "add ${0:x}, ${0:x}, ${0:x}", "=r,0"(i64 %big)
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; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
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; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
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; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
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call i32 asm sideeffect "add ${0:w}, ${1:w}, ${1:w}", "=r,r"(i32 0)
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call i32 asm sideeffect "add ${0:x}, ${1:x}, ${1:x}", "=r,r"(i32 0)
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; CHECK: add {{w[0-9]+}}, wzr, wzr
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; CHECK: add {{x[0-9]+}}, xzr, xzr
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ret void
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}
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define void @test_inline_modifier_bhsdq() nounwind {
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; CHECK: test_inline_modifier_bhsdq:
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call float asm sideeffect "ldr ${0:b}, [sp]", "=w"()
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call float asm sideeffect "ldr ${0:h}, [sp]", "=w"()
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call float asm sideeffect "ldr ${0:s}, [sp]", "=w"()
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call float asm sideeffect "ldr ${0:d}, [sp]", "=w"()
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call float asm sideeffect "ldr ${0:q}, [sp]", "=w"()
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; CHECK: ldr b0, [sp]
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; CHECK: ldr h0, [sp]
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; CHECK: ldr s0, [sp]
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; CHECK: ldr d0, [sp]
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; CHECK: ldr q0, [sp]
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call double asm sideeffect "ldr ${0:b}, [sp]", "=w"()
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call double asm sideeffect "ldr ${0:h}, [sp]", "=w"()
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call double asm sideeffect "ldr ${0:s}, [sp]", "=w"()
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call double asm sideeffect "ldr ${0:d}, [sp]", "=w"()
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call double asm sideeffect "ldr ${0:q}, [sp]", "=w"()
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; CHECK: ldr b0, [sp]
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; CHECK: ldr h0, [sp]
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; CHECK: ldr s0, [sp]
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; CHECK: ldr d0, [sp]
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; CHECK: ldr q0, [sp]
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ret void
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}
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define void @test_inline_modifier_c() nounwind {
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; CHECK: test_inline_modifier_c:
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call void asm sideeffect "adr x0, ${0:c}", "i"(i32 3)
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; CHECK: adr x0, 3
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ret void
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} |