Matt Arsenault 5049ca67c2 R600: Add mul24 intrinsics ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208604 91177308-0d34-0410-b5e6-96231b3b80d8		2014-05-12 17:49:57 +00:00
..
AArch64	AArch64/ARM64: optimise vector selects & enable test	2014-05-07 14:10:27 +00:00
ARM	ARM: Implement big endian bit-conversion for NEON type	2014-05-12 11:19:20 +00:00
ARM64	ARM64: fix SELECT_CC lowering in absence of NaNs.	2014-05-10 07:37:50 +00:00
CPP
Generic
Hexagon
Inputs
Mips	Allow sret on the second parameter as well as the first	2014-05-09 22:32:13 +00:00
MSP430
NVPTX
PowerPC	[PowerPC] Add global named register support	2014-05-11 19:29:11 +00:00
R600	R600: Add mul24 intrinsics	2014-05-12 17:49:57 +00:00
SPARC	Allow sret on the second parameter as well as the first	2014-05-09 22:32:13 +00:00
SystemZ
Thumb
Thumb2
X86	X86: Make sure that we have SSE4.1 before we generate insertps nodes.	2014-05-12 13:12:08 +00:00
XCore