Jakob Stoklund Olesen d1303d2a66 Fix the handling of partial redefines in the fast register allocator. ... A partial redefine needs to be treated like a tied operand, and the register must be reloaded while processing use operands. This fixes a bug where partially redefined registers were processed as normal defs with a reload added. The reload could clobber another use operand if it was a kill that allowed register reuse. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107193 91177308-0d34-0410-b5e6-96231b3b80d8		2010-06-29 19:15:30 +00:00
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Alpha
ARM	Fix the handling of partial redefines in the fast register allocator.	2010-06-29 19:15:30 +00:00
Blackfin
CBackend
CellSPU	Fix some tests that didn't test anything.	2010-06-26 20:05:06 +00:00
CPP
Generic
MBlaze
Mips
MSP430
PIC16
PowerPC	Eliminate the other half of the BRCOND optimization, and update	2010-06-24 15:24:03 +00:00
SPARC
SystemZ
Thumb	Fix some tests that didn't test anything.	2010-06-26 20:05:06 +00:00
Thumb2	PR7503: uxtb16 is not available for ARMv7-M. Patch by Brian G. Lucas.	2010-06-29 05:38:36 +00:00
X86	In asm's, output operands with matching input constraints	2010-06-28 22:09:45 +00:00
XCore