mirror of
https://github.com/c64scene-ar/llvm-6502.git
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8eaed0f63d
This matches the format produced by the AMD proprietary driver.
//==================================================================//
// Shell script for converting .ll test cases: (Pass the .ll files
you want to convert to this script as arguments).
//==================================================================//
; This was necessary on my system so that A-Z in sed would match only
; upper case. I'm not sure why.
export LC_ALL='C'
TEST_FILES="$*"
MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r`
for f in $TEST_FILES; do
# Check that there are SI tests:
grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f
if [ $? -eq 0 ]; then
for match in $MATCHES; do
sed -i -e "s/\([ :]$match\)/\L\1/" $f
done
# Try to get check lines with partial instruction names
sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f
fi
done
sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll
sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll
sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll
sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll
sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll
//==================================================================//
// Shell script for converting .td files (run this last)
//==================================================================//
export LC_ALL='C'
sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td
sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221350 91177308-0d34-0410-b5e6-96231b3b80d8
41 lines
1.2 KiB
LLVM
41 lines
1.2 KiB
LLVM
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
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; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK
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; R600-CHECK: {{^}}test:
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; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW
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; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW
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; SI-CHECK: {{^}}test:
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; SI-CHECK: s_mov_b32 [[ZERO:s[0-9]]], 0{{$}}
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; SI-CHECK: v_mov_b32_e32 v[[V_ZERO:[0-9]]], [[ZERO]]
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; SI-CHECK: buffer_store_dwordx2 v[0:[[V_ZERO]]{{\]}}
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define void @test(i64 addrspace(1)* %out, i32 %a, i32 %b, i32 %c) {
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entry:
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%0 = mul i32 %a, %b
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%1 = add i32 %0, %c
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%2 = zext i32 %1 to i64
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store i64 %2, i64 addrspace(1)* %out
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ret void
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}
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; SI-CHECK-LABEL: {{^}}testi1toi32:
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; SI-CHECK: v_cndmask_b32
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define void @testi1toi32(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp eq i32 %a, %b
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%1 = zext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; SI-CHECK-LABEL: {{^}}zext_i1_to_i64:
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; SI-CHECK: v_cmp_eq_i32
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; SI-CHECK: v_cndmask_b32
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; SI-CHECK: s_mov_b32 s{{[0-9]+}}, 0
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define void @zext_i1_to_i64(i64 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%cmp = icmp eq i32 %a, %b
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%ext = zext i1 %cmp to i64
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store i64 %ext, i64 addrspace(1)* %out, align 8
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ret void
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}
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