Richard Sandiford 219d2b8695 [SystemZ] Improve extload handling ...

The port originally had special patterns for extload, mapping them to the
same instructions as sextload.  It seemed neater to have patterns that
match "an extension that is allowed to be signed" and "an extension that
is allowed to be unsigned".

This was originally meant to be a clean-up, but it does improve the handling
of promoted integers a little, as shown by args-06.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190777 91177308-0d34-0410-b5e6-96231b3b80d8

2013-09-16 09:03:10 +00:00

..

AArch64

Implement aarch64 neon instruction set AdvSIMD (3V Diff), covering the following 26 instructions,

2013-09-09 02:20:27 +00:00

ARM

[ARMv8] Change hasV8Fp to hasFPARMv8, and other command line options

2013-09-13 13:46:57 +00:00

CPP

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Generic

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Hexagon

Debug Info Testing: use null instead of an empty string in context field.

2013-09-09 00:12:17 +00:00

Inputs

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Mips

Expand the mask capability for deciding which functions are mips16 and mips32

2013-09-15 02:09:08 +00:00

MSP430

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NVPTX

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PowerPC

PPC: Don't restrict lvsl generation to after type legalization

2013-09-15 22:09:58 +00:00

R600

R600: Move code handling literal folding into R600ISelLowering.

2013-09-12 23:44:53 +00:00

SPARC

[Sparc] Correctly handle call to functions with ReturnsTwice attribute.

2013-09-05 05:32:16 +00:00

SystemZ

[SystemZ] Improve extload handling

2013-09-16 09:03:10 +00:00

Thumb

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Thumb2

[ARMv8] Prevent generation of deprecated IT blocks on ARMv8 in Thumb mode.

2013-09-09 14:21:49 +00:00

X86

Implement function prefix data as an IR feature.

2013-09-16 01:08:15 +00:00

XCore

XCore handling of thread local lowering

2013-09-09 10:42:11 +00:00