llvm-6502/test/CodeGen/ARM/fast-isel-mvn.ll
Derek Schuff ed788b6283 Fix ARM FastISel tests, as a first step to enabling ARM FastISel
ARM FastISel is currently only enabled for iOS non-Thumb1, and I'm working on
enabling it for other targets. As a first step I've fixed some of the tests.
Changes to ARM FastISel tests:
- Different triples don't generate the same relocations (especially
  movw/movt versus constant pool loads). Use a regex to allow either.
- Mangling is different. Use a regex to allow either.
- The reserved registers are sometimes different, so registers get
  allocated in a different order. Capture the names only where this
  occurs.
- Add -verify-machineinstrs to some tests where it works. It doesn't
  work everywhere it should yet.
- Add -fast-isel-abort to many tests that didn't have it before.
- Split out the VarArg test from fast-isel-call.ll into its own
  test. This simplifies test setup because of --check-prefix.

Patch by JF Bastien

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181801 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-14 16:26:38 +00:00

108 lines
2.0 KiB
LLVM

; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
; rdar://10412592
; Note: The Thumb code is being generated by the target-independent selector.
define void @t1() nounwind {
entry:
; ARM: t1
; THUMB: t1
; ARM: mvn r0, #0
; THUMB: movw r0, #65535
; THUMB: movt r0, #65535
call void @foo(i32 -1)
ret void
}
declare void @foo(i32)
define void @t2() nounwind {
entry:
; ARM: t2
; THUMB: t2
; ARM: mvn r0, #233
; THUMB: movw r0, #65302
; THUMB: movt r0, #65535
call void @foo(i32 -234)
ret void
}
define void @t3() nounwind {
entry:
; ARM: t3
; THUMB: t3
; ARM: mvn r0, #256
; THUMB: movw r0, #65279
; THUMB: movt r0, #65535
call void @foo(i32 -257)
ret void
}
; Load from constant pool
define void @t4() nounwind {
entry:
; ARM: t4
; THUMB: t4
; ARM: ldr r0
; THUMB: movw r0, #65278
; THUMB: movt r0, #65535
call void @foo(i32 -258)
ret void
}
define void @t5() nounwind {
entry:
; ARM: t5
; THUMB: t5
; ARM: mvn r0, #65280
; THUMB: movs r0, #255
; THUMB: movt r0, #65535
call void @foo(i32 -65281)
ret void
}
define void @t6() nounwind {
entry:
; ARM: t6
; THUMB: t6
; ARM: mvn r0, #978944
; THUMB: movw r0, #4095
; THUMB: movt r0, #65521
call void @foo(i32 -978945)
ret void
}
define void @t7() nounwind {
entry:
; ARM: t7
; THUMB: t7
; ARM: mvn r0, #267386880
; THUMB: movw r0, #65535
; THUMB: movt r0, #61455
call void @foo(i32 -267386881)
ret void
}
define void @t8() nounwind {
entry:
; ARM: t8
; THUMB: t8
; ARM: mvn r0, #65280
; THUMB: movs r0, #255
; THUMB: movt r0, #65535
call void @foo(i32 -65281)
ret void
}
define void @t9() nounwind {
entry:
; ARM: t9
; THUMB: t9
; ARM: mvn r0, #2130706432
; THUMB: movw r0, #65535
; THUMB: movt r0, #33023
call void @foo(i32 -2130706433)
ret void
}