mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
128 lines
3.3 KiB
LLVM
128 lines
3.3 KiB
LLVM
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-linux-gnu | FileCheck %s
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; Note that this should be refactored (for efficiency if nothing else)
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; when the PCS is implemented so we don't have to worry about the
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; loads and stores.
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@var_i32 = global i32 42
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@var_i64 = global i64 0
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; Add pure 12-bit immediates:
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define void @add_small() {
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; CHECK-LABEL: add_small:
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; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, #4095
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%val32 = load i32, i32* @var_i32
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%newval32 = add i32 %val32, 4095
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store i32 %newval32, i32* @var_i32
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; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, #52
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%val64 = load i64, i64* @var_i64
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%newval64 = add i64 %val64, 52
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store i64 %newval64, i64* @var_i64
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ret void
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}
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; Add 12-bit immediates, shifted left by 12 bits
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define void @add_med() {
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; CHECK-LABEL: add_med:
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; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{#3567, lsl #12|#14610432}}
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%val32 = load i32, i32* @var_i32
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%newval32 = add i32 %val32, 14610432 ; =0xdef000
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store i32 %newval32, i32* @var_i32
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; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{#4095, lsl #12|#16773120}}
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%val64 = load i64, i64* @var_i64
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%newval64 = add i64 %val64, 16773120 ; =0xfff000
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store i64 %newval64, i64* @var_i64
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ret void
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}
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; Subtract 12-bit immediates
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define void @sub_small() {
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; CHECK-LABEL: sub_small:
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; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, #4095
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%val32 = load i32, i32* @var_i32
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%newval32 = sub i32 %val32, 4095
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store i32 %newval32, i32* @var_i32
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; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, #52
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%val64 = load i64, i64* @var_i64
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%newval64 = sub i64 %val64, 52
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store i64 %newval64, i64* @var_i64
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ret void
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}
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; Subtract 12-bit immediates, shifted left by 12 bits
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define void @sub_med() {
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; CHECK-LABEL: sub_med:
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; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, {{#3567, lsl #12|#14610432}}
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%val32 = load i32, i32* @var_i32
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%newval32 = sub i32 %val32, 14610432 ; =0xdef000
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store i32 %newval32, i32* @var_i32
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; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, {{#4095, lsl #12|#16773120}}
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%val64 = load i64, i64* @var_i64
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%newval64 = sub i64 %val64, 16773120 ; =0xfff000
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store i64 %newval64, i64* @var_i64
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ret void
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}
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define void @testing() {
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; CHECK-LABEL: testing:
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%val = load i32, i32* @var_i32
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; CHECK: cmp {{w[0-9]+}}, #4095
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; CHECK: b.ne [[RET:.?LBB[0-9]+_[0-9]+]]
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%cmp_pos_small = icmp ne i32 %val, 4095
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br i1 %cmp_pos_small, label %ret, label %test2
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test2:
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; CHECK: cmp {{w[0-9]+}}, {{#3567, lsl #12|#14610432}}
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; CHECK: b.lo [[RET]]
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%newval2 = add i32 %val, 1
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store i32 %newval2, i32* @var_i32
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%cmp_pos_big = icmp ult i32 %val, 14610432
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br i1 %cmp_pos_big, label %ret, label %test3
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test3:
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; CHECK: cmp {{w[0-9]+}}, #123
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; CHECK: b.lt [[RET]]
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%newval3 = add i32 %val, 2
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store i32 %newval3, i32* @var_i32
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%cmp_pos_slt = icmp slt i32 %val, 123
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br i1 %cmp_pos_slt, label %ret, label %test4
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test4:
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; CHECK: cmp {{w[0-9]+}}, #321
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; CHECK: b.gt [[RET]]
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%newval4 = add i32 %val, 3
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store i32 %newval4, i32* @var_i32
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%cmp_pos_sgt = icmp sgt i32 %val, 321
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br i1 %cmp_pos_sgt, label %ret, label %test5
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test5:
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; CHECK: cmn {{w[0-9]+}}, #444
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; CHECK: b.gt [[RET]]
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%newval5 = add i32 %val, 4
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store i32 %newval5, i32* @var_i32
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%cmp_neg_uge = icmp sgt i32 %val, -444
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br i1 %cmp_neg_uge, label %ret, label %test6
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test6:
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%newval6 = add i32 %val, 5
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store i32 %newval6, i32* @var_i32
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ret void
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ret:
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ret void
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}
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; TODO: adds/subs
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