mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-21 18:29:45 +00:00
8f9108459e
Based on the support for .req on ARM. The aarch64 variant has to keep track if the alias register was a vector register (v0-31) or a general purpose or VFP/Advanced SIMD ([bhsdq]0-31) register. Patch by Janne Grunau! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212161 91177308-0d34-0410-b5e6-96231b3b80d8
38 lines
1.0 KiB
ArmAsm
38 lines
1.0 KiB
ArmAsm
// RUN: not llvm-mc -triple aarch64-none-linux-gnu < %s 2>&1 | FileCheck --check-prefix=CHECK --check-prefix=CHECK-ERROR %s
|
|
|
|
bar:
|
|
fred .req x5
|
|
fred .req x6
|
|
// CHECK-ERROR: warning: ignoring redefinition of register alias 'fred'
|
|
// CHECK-ERROR: fred .req x6
|
|
// CHECK-ERROR: ^
|
|
|
|
ada .req v2.8b
|
|
// CHECK-ERROR: error: vector register without type specifier expected
|
|
// CHECK-ERROR: ada .req v2.8b
|
|
// CHECK-ERROR: ^
|
|
|
|
bob .req lisa
|
|
// CHECK-ERROR: error: register name or alias expected
|
|
// CHECK-ERROR: bob .req lisa
|
|
// CHECK-ERROR: ^
|
|
|
|
lisa .req x1, 23
|
|
// CHECK-ERROR: error: unexpected input in .req directive
|
|
// CHECK-ERROR: lisa .req x1, 23
|
|
// CHECK-ERROR: ^
|
|
|
|
mov bob, fred
|
|
// CHECK-ERROR: error: invalid operand for instruction
|
|
// CHECK-ERROR: mov bob, fred
|
|
// CHECK-ERROR: ^
|
|
|
|
.unreq 1
|
|
// CHECK-ERROR: error: unexpected input in .unreq directive.
|
|
// CHECK-ERROR: .unreq 1
|
|
// CHECK-ERROR: ^
|
|
|
|
mov x1, fred
|
|
// CHECK: mov x1, x5
|
|
// CHECK-NOT: mov x1, x6
|