Rafael Espindola 6cac2025da Add a triple. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138831 91177308-0d34-0410-b5e6-96231b3b80d8		2011-08-30 21:19:37 +00:00
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Alpha
ARM	Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical	2011-08-30 01:34:54 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic	Revert r138606 until LowerInvoke has been converted to the new EH scheme.	2011-08-26 21:11:23 +00:00
MBlaze
Mips	Use subword loads instead of a 4-byte load when the size of a structure (or a	2011-08-18 23:39:37 +00:00
MSP430
PowerPC	Set CR1EQ only when lowering vararg floating arguments (not any vararg	2011-08-30 17:04:16 +00:00
PTX
SPARC
SystemZ
Thumb
Thumb2	Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical	2011-08-30 01:34:54 +00:00
X86	Add a triple.	2011-08-30 21:19:37 +00:00
XCore	Add Uses=[SP] to call instructions. This fixes a miscompilation with a	2011-08-24 13:32:43 +00:00