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397fc4874e
The getPointerRegClass() hook can return register classes that depend on the calling convention of the current function (ptr_rc_tailcall). So far, we have been able to infer the calling convention from the subtarget alone, but as we add support for multiple calling conventions per target, that no longer works. Patch by Yiannis Tsiouris! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156328 91177308-0d34-0410-b5e6-96231b3b80d8
80 lines
2.7 KiB
C++
80 lines
2.7 KiB
C++
//===-- PPCRegisterInfo.h - PowerPC Register Information Impl ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the PowerPC implementation of the TargetRegisterInfo
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// class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef POWERPC32_REGISTERINFO_H
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#define POWERPC32_REGISTERINFO_H
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#include "PPC.h"
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#include <map>
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#define GET_REGINFO_HEADER
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#include "PPCGenRegisterInfo.inc"
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namespace llvm {
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class PPCSubtarget;
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class TargetInstrInfo;
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class Type;
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class PPCRegisterInfo : public PPCGenRegisterInfo {
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std::map<unsigned, unsigned> ImmToIdxMap;
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const PPCSubtarget &Subtarget;
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const TargetInstrInfo &TII;
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public:
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PPCRegisterInfo(const PPCSubtarget &SubTarget, const TargetInstrInfo &tii);
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/// getPointerRegClass - Return the register class to use to hold pointers.
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/// This is used for addressing modes.
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virtual const TargetRegisterClass *
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getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const;
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unsigned getRegPressureLimit(const TargetRegisterClass *RC,
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MachineFunction &MF) const;
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/// Code Generation virtual methods...
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const uint16_t *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
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const unsigned *getCallPreservedMask(CallingConv::ID CC) const;
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BitVector getReservedRegs(const MachineFunction &MF) const;
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/// requiresRegisterScavenging - We require a register scavenger.
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/// FIXME (64-bit): Should be inlined.
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bool requiresRegisterScavenging(const MachineFunction &MF) const;
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bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const;
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void eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const;
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void lowerDynamicAlloc(MachineBasicBlock::iterator II,
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int SPAdj, RegScavenger *RS) const;
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void lowerCRSpilling(MachineBasicBlock::iterator II, unsigned FrameIndex,
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int SPAdj, RegScavenger *RS) const;
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void lowerCRRestore(MachineBasicBlock::iterator II, unsigned FrameIndex,
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int SPAdj, RegScavenger *RS) const;
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void eliminateFrameIndex(MachineBasicBlock::iterator II,
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int SPAdj, RegScavenger *RS = NULL) const;
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// Debug information queries.
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unsigned getFrameRegister(const MachineFunction &MF) const;
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// Exception handling queries.
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unsigned getEHExceptionRegister() const;
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unsigned getEHHandlerRegister() const;
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};
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} // end namespace llvm
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#endif
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