llvm-6502/lib/Target/R600
Matt Arsenault 2220408e1a Support REG_SEQUENCE in tablegen.
The problem is mostly that variadic output instruction
aren't handled, so it is rejected for having an inconsistent
number of operands, and then the right number of operands
isn't emitted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221117 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-02 23:46:51 +00:00
..
InstPrinter R600/SI: Change how DS offsets are printed 2014-10-10 22:16:07 +00:00
MCTargetDesc R600: Use default GlobalDirective 2014-10-21 21:08:36 +00:00
TargetInfo
AMDGPU.h Revert "R600: Make sure to inline all internal functions" 2014-10-31 23:35:26 +00:00
AMDGPU.td R600/SI: Add load / store machine optimizer pass. 2014-10-10 22:01:59 +00:00
AMDGPUAsmPrinter.cpp R600: Align functions to 256 bytes 2014-10-03 19:02:02 +00:00
AMDGPUAsmPrinter.h
AMDGPUCallingConv.td
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp R600: Remove dead code 2014-10-07 21:29:56 +00:00
AMDGPUInstrInfo.h R600: Remove dead code 2014-10-07 21:29:56 +00:00
AMDGPUInstrInfo.td
AMDGPUInstructions.td R600/SI: Add global atomicrmw xchg 2014-10-17 23:33:03 +00:00
AMDGPUIntrinsicInfo.cpp
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td
AMDGPUISelDAGToDAG.cpp R600/SI: Remove SI_BUFFER_RSRC pseudo 2014-10-17 17:42:56 +00:00
AMDGPUISelLowering.cpp Add minnum / maxnum codegen 2014-10-21 23:01:01 +00:00
AMDGPUISelLowering.h R600: Remove dead function 2014-10-16 00:08:09 +00:00
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h Reapply "R600: Add new intrinsic to read work dimensions" 2014-10-14 20:05:26 +00:00
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPUPromoteAlloca.cpp R600: Don't promote allocas when one of the users is a ptrtoint instruction 2014-10-31 20:52:04 +00:00
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp R600/SI: Add load / store machine optimizer pass. 2014-10-10 22:01:59 +00:00
AMDGPUSubtarget.h R600/SI: Add load / store machine optimizer pass. 2014-10-10 22:01:59 +00:00
AMDGPUTargetMachine.cpp Revert "R600: Make sure to inline all internal functions" 2014-10-31 23:35:26 +00:00
AMDGPUTargetMachine.h
AMDGPUTargetTransformInfo.cpp
AMDILCFGStructurizer.cpp
CaymanInstructions.td
CMakeLists.txt Revert "R600: Add missing file to CMakeLists.txt" 2014-10-31 23:39:10 +00:00
EvergreenInstructions.td
LLVMBuild.txt R600: Add IPO to the list of required libraries 2014-10-31 21:52:08 +00:00
Makefile
Processors.td
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp Remove unnecessary copying or replace it with moves in a bunch of places. 2014-10-04 16:55:56 +00:00
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp Remove unused argument to CreateTargetScheduleState and change 2014-10-09 01:59:35 +00:00
R600InstrInfo.h Remove unused argument to CreateTargetScheduleState and change 2014-10-09 01:59:35 +00:00
R600Instructions.td R600: FMA is VecALU only instruction 2014-10-14 18:52:04 +00:00
R600Intrinsics.td
R600ISelLowering.cpp Reapply "R600: Add new intrinsic to read work dimensions" 2014-10-14 20:05:26 +00:00
R600ISelLowering.h
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp Eliminate some deep std::vector copies. NFC. 2014-10-03 18:33:16 +00:00
R600Packetizer.cpp
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
R700Instructions.td
SIAnnotateControlFlow.cpp
SIDefines.h
SIFixSGPRCopies.cpp R600/SI: Simplify debug printing 2014-10-17 00:36:20 +00:00
SIFixSGPRLiveRanges.cpp
SIInsertWaits.cpp
SIInstrFormats.td R600/SI: Refactor VOP1 instruction defs 2014-10-07 23:51:34 +00:00
SIInstrInfo.cpp Fix typo 2014-10-17 18:02:31 +00:00
SIInstrInfo.h R600/SI: Fix general commuting breaking src mods 2014-10-17 18:00:43 +00:00
SIInstrInfo.td R600/SI: Change how DS offsets are printed 2014-10-10 22:16:07 +00:00
SIInstructions.td Support REG_SEQUENCE in tablegen. 2014-11-02 23:46:51 +00:00
SIIntrinsics.td
SIISelLowering.cpp Add minnum / maxnum codegen 2014-10-21 23:01:01 +00:00
SIISelLowering.h R600/SI: Add pattern for bswap 2014-10-21 16:25:08 +00:00
SILoadStoreOptimizer.cpp Work around bugs in MSVC "14" CTP 3's conversion logic 2014-10-31 23:19:46 +00:00
SILowerControlFlow.cpp
SILowerI1Copies.cpp Fix typo 2014-10-09 19:15:15 +00:00
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIRegisterInfo.cpp
SIRegisterInfo.h
SIRegisterInfo.td R600/SI: Disable copying of SCC 2014-10-10 17:44:47 +00:00
SISchedule.td
SIShrinkInstructions.cpp R600/SI: Also check for FPImm literal constants 2014-10-17 18:00:50 +00:00
SITypeRewriter.cpp