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6035518e3b
shorter/easier and have the DAG use that to do the same lookup. This can be used in the future for TargetMachine based caching lookups from the MachineFunction easily. Update the MIPS subtarget switching machinery to update this pointer at the same time it runs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214838 91177308-0d34-0410-b5e6-96231b3b80d8
134 lines
4.9 KiB
C++
134 lines
4.9 KiB
C++
//===-- MipsFrameLowering.cpp - Mips Frame Information --------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Mips implementation of TargetFrameLowering class.
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//
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//===----------------------------------------------------------------------===//
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#include "MipsFrameLowering.h"
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#include "MCTargetDesc/MipsBaseInfo.h"
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#include "MipsAnalyzeImmediate.h"
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#include "MipsInstrInfo.h"
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#include "MipsMachineFunction.h"
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#include "MipsTargetMachine.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/Function.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Target/TargetOptions.h"
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using namespace llvm;
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//===----------------------------------------------------------------------===//
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//
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// Stack Frame Processing methods
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// +----------------------------+
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//
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// The stack is allocated decrementing the stack pointer on
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// the first instruction of a function prologue. Once decremented,
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// all stack references are done thought a positive offset
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// from the stack/frame pointer, so the stack is considering
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// to grow up! Otherwise terrible hacks would have to be made
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// to get this stack ABI compliant :)
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//
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// The stack frame required by the ABI (after call):
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// Offset
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//
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// 0 ----------
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// 4 Args to pass
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// . saved $GP (used in PIC)
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// . Alloca allocations
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// . Local Area
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// . CPU "Callee Saved" Registers
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// . saved FP
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// . saved RA
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// . FPU "Callee Saved" Registers
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// StackSize -----------
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//
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// Offset - offset from sp after stack allocation on function prologue
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//
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// The sp is the stack pointer subtracted/added from the stack size
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// at the Prologue/Epilogue
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//
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// References to the previous stack (to obtain arguments) are done
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// with offsets that exceeds the stack size: (stacksize+(4*(num_arg-1))
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//
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// Examples:
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// - reference to the actual stack frame
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// for any local area var there is smt like : FI >= 0, StackOffset: 4
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// sw REGX, 4(SP)
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//
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// - reference to previous stack frame
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// suppose there's a load to the 5th arguments : FI < 0, StackOffset: 16.
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// The emitted instruction will be something like:
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// lw REGX, 16+StackSize(SP)
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//
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// Since the total stack size is unknown on LowerFormalArguments, all
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// stack references (ObjectOffset) created to reference the function
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// arguments, are negative numbers. This way, on eliminateFrameIndex it's
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// possible to detect those references and the offsets are adjusted to
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// their real location.
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//
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//===----------------------------------------------------------------------===//
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const MipsFrameLowering *MipsFrameLowering::create(const MipsSubtarget &ST) {
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if (ST.inMips16Mode())
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return llvm::createMips16FrameLowering(ST);
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return llvm::createMipsSEFrameLowering(ST);
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}
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// hasFP - Return true if the specified function should have a dedicated frame
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// pointer register. This is true if the function has variable sized allocas or
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// if frame pointer elimination is disabled.
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bool MipsFrameLowering::hasFP(const MachineFunction &MF) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return MF.getTarget().Options.DisableFramePointerElim(MF) ||
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MFI->hasVarSizedObjects() || MFI->isFrameAddressTaken();
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}
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uint64_t MipsFrameLowering::estimateStackSize(const MachineFunction &MF) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
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int64_t Offset = 0;
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// Iterate over fixed sized objects.
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for (int I = MFI->getObjectIndexBegin(); I != 0; ++I)
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Offset = std::max(Offset, -MFI->getObjectOffset(I));
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// Conservatively assume all callee-saved registers will be saved.
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for (const MCPhysReg *R = TRI.getCalleeSavedRegs(&MF); *R; ++R) {
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unsigned Size = TRI.getMinimalPhysRegClass(*R)->getSize();
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Offset = RoundUpToAlignment(Offset + Size, Size);
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}
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unsigned MaxAlign = MFI->getMaxAlignment();
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// Check that MaxAlign is not zero if there is a stack object that is not a
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// callee-saved spill.
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assert(!MFI->getObjectIndexEnd() || MaxAlign);
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// Iterate over other objects.
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for (unsigned I = 0, E = MFI->getObjectIndexEnd(); I != E; ++I)
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Offset = RoundUpToAlignment(Offset + MFI->getObjectSize(I), MaxAlign);
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// Call frame.
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if (MFI->adjustsStack() && hasReservedCallFrame(MF))
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Offset = RoundUpToAlignment(Offset + MFI->getMaxCallFrameSize(),
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std::max(MaxAlign, getStackAlignment()));
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return RoundUpToAlignment(Offset, getStackAlignment());
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}
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