Jakob Stoklund Olesen 9243c4f7c5 Pass the right sign to TLI->isLegalICmpImmediate. ... LSR can fold three addressing modes into its ICmpZero node: ICmpZero BaseReg + Offset => ICmp BaseReg, -Offset ICmpZero -1*ScaleReg + Offset => ICmp ScaleReg, Offset ICmpZero BaseReg + -1*ScaleReg => ICmp BaseReg, ScaleReg The first two cases are only used if TLI->isLegalICmpImmediate() likes the offset. Make sure the right Offset sign is passed to this method in the second case. The ARM version is not symmetric. <rdar://problem/11184260> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154079 91177308-0d34-0410-b5e6-96231b3b80d8		2012-04-05 03:10:56 +00:00
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Hello
InstCombine	Always compute all the bits in ComputeMaskedBits.	2012-04-04 12:51:34 +00:00
Instrumentation	[tsan] treat vtable pointer updates in a special way (requires tbaa); fix a bug (forgot to return true after instrumenting); make sure the tsan tests are run	2012-03-26 17:35:03 +00:00
IPO	Add an option to turn off the expensive GVN load PRE part of GVN.	2012-04-02 22:16:50 +00:00
Scalar	Pass the right sign to TLI->isLegalICmpImmediate.	2012-04-05 03:10:56 +00:00
Utils	Always compute all the bits in ComputeMaskedBits.	2012-04-04 12:51:34 +00:00
Vectorize	Correctly vectorize powi.	2012-03-31 03:38:40 +00:00
CMakeLists.txt	Add a basic-block autovectorization pass.	2012-02-01 03:51:43 +00:00
LLVMBuild.txt	Add a basic-block autovectorization pass.	2012-02-01 03:51:43 +00:00
Makefile	Add a basic-block autovectorization pass.	2012-02-01 03:51:43 +00:00