Johnny Chen 276f6f9cf9 There were two issues fixed: ... 1. The ARM Darwin *r9 call instructions were pseudo-ized recently. Modify the ARMDisassemblerCore.cpp file to accomodate the change. 2. The disassembler was unnecessarily adding 8 to the sign-extended imm24: imm32 = SignExtend(imm24:'00', 32); // A8.6.23 BL, BLX (immediate) // Encoding A1 It has no business doing such. Removed the offending logic. Add test cases to arm-tests.txt. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127707 91177308-0d34-0410-b5e6-96231b3b80d8		2011-03-15 22:27:33 +00:00
..
ARM	Roll r127459 back in:	2011-03-11 21:52:04 +00:00
AsmParser	Move arch specific tests in arch specific directories.	2011-02-24 19:06:27 +00:00
COFF
Disassembler	There were two issues fixed:	2011-03-15 22:27:33 +00:00
ELF	Be nice to Xcore and the XMOS assembler and avoid quoting section names	2011-03-04 20:03:14 +00:00
MachO	Move arch specific tests in arch specific directories.	2011-02-24 19:06:27 +00:00
MBlaze
X86	Followup to r126970: add 64-bit encoding tests for str with reg operand.	2011-03-04 04:06:47 +00:00