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https://github.com/c64scene-ar/llvm-6502.git
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b52bf6a3b3
All shift operations will be selected as SALU instructions and then if necessary lowered to VALU instructions in the SIFixSGPRCopies pass. This allows us to do more operations on the SALU which will improve performance and is also required for implementing private memory using indirect addressing, since the private memory pointers must stay in the scalar registers. This patch includes some fixes from Matt Arsenault. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194625 91177308-0d34-0410-b5e6-96231b3b80d8
39 lines
1.5 KiB
C++
39 lines
1.5 KiB
C++
//===-- SIDefines.h - SI Helper Macros ----------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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/// \file
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//===----------------------------------------------------------------------===//
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#ifndef SIDEFINES_H_
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#define SIDEFINES_H_
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namespace SIInstrFlags {
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enum {
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MIMG = 1 << 3,
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SMRD = 1 << 4,
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VOP1 = 1 << 5,
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VOP2 = 1 << 6,
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VOP3 = 1 << 7,
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VOPC = 1 << 8,
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SALU = 1 << 9
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};
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}
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#define R_00B028_SPI_SHADER_PGM_RSRC1_PS 0x00B028
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#define R_00B02C_SPI_SHADER_PGM_RSRC2_PS 0x00B02C
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#define S_00B02C_EXTRA_LDS_SIZE(x) (((x) & 0xFF) << 8)
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#define R_00B128_SPI_SHADER_PGM_RSRC1_VS 0x00B128
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#define R_00B228_SPI_SHADER_PGM_RSRC1_GS 0x00B228
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#define R_00B848_COMPUTE_PGM_RSRC1 0x00B848
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#define S_00B028_VGPRS(x) (((x) & 0x3F) << 0)
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#define S_00B028_SGPRS(x) (((x) & 0x0F) << 6)
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#define R_00B84C_COMPUTE_PGM_RSRC2 0x00B84C
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#define S_00B84C_LDS_SIZE(x) (((x) & 0x1FF) << 15)
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#define R_0286CC_SPI_PS_INPUT_ENA 0x0286CC
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#endif // SIDEFINES_H_
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