Bradley Smith 4fe6d075d5 [ARM] Add missing M/R class CPUs ... Add some of the missing M and R class Cortex CPUs, namely: Cortex-M0+ (called Cortex-M0plus for GCC compatibility) Cortex-M1 SC000 SC300 Cortex-R5 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229660 91177308-0d34-0410-b5e6-96231b3b80d8		2015-02-18 10:33:30 +00:00
..
AArch64	AArch64: Safely handle the incoming sret call argument.	2015-02-16 18:10:47 +00:00
ARM	[ARM] Add missing M/R class CPUs	2015-02-18 10:33:30 +00:00
BPF	bpf: add missing lit.local.cfg	2015-01-24 18:20:52 +00:00
CPP
Generic	overloaded-intrinsic-name: exercise anyptr on struct	2015-01-27 20:03:08 +00:00
Hexagon	[Hexagon] Factoring classes out of store patterns.	2015-02-09 20:33:46 +00:00
Inputs	IR: Move MDLocation into place	2015-01-14 22:27:36 +00:00
Mips	[mips][microMIPS] Delay slot filler: Replace the microMIPS JR with the JRC	2015-02-13 17:51:27 +00:00
MSP430
NVPTX	[NVPTX] Emit .pragma "nounroll" for loops marked with nounroll	2015-02-01 02:27:45 +00:00
PowerPC	Move ABI handling and 64-bitness to the PowerPC target machine.	2015-02-17 06:45:15 +00:00
R600	R600/SI: Add missing offset operand to buffer bothen	2015-02-18 02:04:38 +00:00
SPARC	SelectionDAG: fold (fp_to_u/sint (s/uint_to_fp)) here too	2015-02-16 21:47:58 +00:00
SystemZ	[SystemZ] Support all TLS access models - CodeGen part	2015-02-18 09:13:27 +00:00
Thumb	IR: Move MDLocation into place	2015-01-14 22:27:36 +00:00
Thumb2	Make buildbots better.	2015-02-11 12:24:09 +00:00
X86	Fixes two issue in SimplifyDemandedBits of sext_in_reg:	2015-02-18 09:43:40 +00:00
XCore	IR: Move MDLocation into place	2015-01-14 22:27:36 +00:00