Jakob Stoklund Olesen 5b8e04cd71 Always let value types influence register classes. ... When creating a virtual register for a def, the value type should be used to pick the register class. If we only use the register class constraint on the instruction, we might pick a too large register class. Some registers can store values of different sizes. For example, the x86 xmm registers can hold f32, f64, and 128-bit vectors. The three different value sizes are represented by register classes with identical register sets: FR32, FR64, and VR128. These register classes have different spill slot sizes, so it is important to use the right one. The register class constraint on an instruction doesn't necessarily care about the size of the value its defining. The value type determines that. This fixes a problem where InstrEmitter was picking 32-bit register classes for 64-bit values on SPARC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199187 91177308-0d34-0410-b5e6-96231b3b80d8		2014-01-14 06:18:38 +00:00
..
64abi.ll	The SPARCv9 ABI returns a float in %f0.	2014-01-12 04:13:17 +00:00
64bit.ll	[Sparc] Emit retl/ret instead of jmp instruction. It improves the readability of the assembly generated.	2014-01-10 02:55:27 +00:00
64cond.ll	The SPARCv9 ABI returns a float in %f0.	2014-01-12 04:13:17 +00:00
64spill.ll	[SparcV9] Use separate instruction patterns for 64 bit arithmetic instructions instead of reusing 32 bit instruction patterns.	2013-12-29 07:15:09 +00:00
2006-01-22-BitConvertLegalize.ll
2007-05-09-JumpTables.ll
2007-07-05-LiveIntervalAssert.ll
2008-10-10-InlineAsmMemoryOperand.ll
2008-10-10-InlineAsmRegOperand.ll
2009-08-28-PIC.ll
2009-08-28-WeakLinkage.ll
2011-01-11-Call.ll	[Sparc] Emit retl/ret instead of jmp instruction. It improves the readability of the assembly generated.	2014-01-10 02:55:27 +00:00
2011-01-11-CC.ll
2011-01-11-FrameAddr.ll	[Sparc] Emit retl/ret instead of jmp instruction. It improves the readability of the assembly generated.	2014-01-10 02:55:27 +00:00
2011-01-19-DelaySlot.ll	[Sparc] Bundle instruction with delay slow and its filler. Now, we can use -verify-machineinstrs with SPARC backend.	2014-01-11 19:38:03 +00:00
2011-01-21-ByValArgs.ll
2011-01-22-SRet.ll
2011-12-03-TailDuplication.ll
2012-05-01-LowerArguments.ll
2013-05-17-CallFrame.ll	[SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack BIAS on sparcV9.	2013-12-09 05:13:25 +00:00
atomics.ll	[Sparc] Handle atomic loads/stores in sparc backend.	2014-01-01 22:11:54 +00:00
basictest.ll
blockaddr.ll
constpool.ll	The SPARCv9 ABI returns a float in %f0.	2014-01-12 04:13:17 +00:00
ctpop.ll	[Sparc] Add missing processor types: v7 and niagara	2014-01-11 23:56:13 +00:00
DbgValueOtherTargets.test
exception.ll	[Sparc] Lower and MachineInstr to MC and print assembly using MCInstPrinter.	2013-12-26 01:49:59 +00:00
float.ll
fp128.ll	[Sparc] Emit retl/ret instead of jmp instruction. It improves the readability of the assembly generated.	2014-01-10 02:55:27 +00:00
globals.ll	[Sparc] Emit retl/ret instead of jmp instruction. It improves the readability of the assembly generated.	2014-01-10 02:55:27 +00:00
leafproc.ll	[Sparc] Emit retl/ret instead of jmp instruction. It improves the readability of the assembly generated.	2014-01-10 02:55:27 +00:00
lit.local.cfg
missinglabel.ll	Handle bundled terminators in isBlockOnlyReachableByFallthrough.	2014-01-12 19:24:08 +00:00
mult-alt-generic-sparc.ll
private.ll
rem.ll	[Sparc] Emit retl/ret instead of jmp instruction. It improves the readability of the assembly generated.	2014-01-10 02:55:27 +00:00
setjmp.ll
spillsize.ll	Always let value types influence register classes.	2014-01-14 06:18:38 +00:00
tls.ll
varargs.ll