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https://github.com/c64scene-ar/llvm-6502.git
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0fc8c68b11
ARM symbol variants are written with parens instead of @ like this: .word __GLOBAL_I_a(target1) This commit adds support for parsing these symbol variants in expressions. We introduce a new flag to MCAsmInfo that indicates the parser should use parens to parse the symbol variant. The expression parser is modified to look for symbol variants using parens instead of @ when the corresponding MCAsmInfo flag is true. The MCAsmInfo parens flag is enabled only for ARM on ELF. By adding this flag to MCAsmInfo, we are able to get rid of redundant ARM-specific symbol variants and use the generic variants instead (e.g. VK_GOT instead of VK_ARM_GOT). We use the new UseParensForSymbolVariant attribute in MCAsmInfo to correctly print the symbol variants for arm. To achive this we need to keep a handle to the MCAsmInfo in the MCSymbolRefExpr class that we can check when printing the symbol variant. Updated Tests: Changed case of symbol variant to match the generic kind. test/CodeGen/ARM/tls-models.ll test/CodeGen/ARM/tls1.ll test/CodeGen/ARM/tls2.ll test/CodeGen/Thumb2/tls1.ll test/CodeGen/Thumb2/tls2.ll PR18080 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196424 91177308-0d34-0410-b5e6-96231b3b80d8
290 lines
9.4 KiB
C++
290 lines
9.4 KiB
C++
//===-- ARMELFObjectWriter.cpp - ARM ELF Writer ---------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/ARMMCTargetDesc.h"
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#include "MCTargetDesc/ARMFixupKinds.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/StringSwitch.h"
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#include "llvm/MC/MCELFObjectWriter.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCSectionELF.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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namespace {
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class ARMELFObjectWriter : public MCELFObjectTargetWriter {
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enum { DefaultEABIVersion = 0x05000000U };
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unsigned GetRelocTypeInner(const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel) const;
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public:
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ARMELFObjectWriter(uint8_t OSABI);
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virtual ~ARMELFObjectWriter();
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virtual unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,
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bool IsPCRel, bool IsRelocWithSymbol,
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int64_t Addend) const;
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virtual const MCSymbol *ExplicitRelSym(const MCAssembler &Asm,
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const MCValue &Target,
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const MCFragment &F,
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const MCFixup &Fixup,
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bool IsPCRel) const;
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};
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}
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ARMELFObjectWriter::ARMELFObjectWriter(uint8_t OSABI)
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: MCELFObjectTargetWriter(/*Is64Bit*/ false, OSABI,
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ELF::EM_ARM,
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/*HasRelocationAddend*/ false) {}
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ARMELFObjectWriter::~ARMELFObjectWriter() {}
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// In ARM, _MergedGlobals and other most symbols get emitted directly.
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// I.e. not as an offset to a section symbol.
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// This code is an approximation of what ARM/gcc does.
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STATISTIC(PCRelCount, "Total number of PIC Relocations");
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STATISTIC(NonPCRelCount, "Total number of non-PIC relocations");
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const MCSymbol *ARMELFObjectWriter::ExplicitRelSym(const MCAssembler &Asm,
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const MCValue &Target,
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const MCFragment &F,
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const MCFixup &Fixup,
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bool IsPCRel) const {
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const MCSymbol &Symbol = Target.getSymA()->getSymbol().AliasedSymbol();
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bool EmitThisSym = false;
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const MCSectionELF &Section =
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static_cast<const MCSectionELF&>(Symbol.getSection());
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bool InNormalSection = true;
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unsigned RelocType = 0;
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RelocType = GetRelocTypeInner(Target, Fixup, IsPCRel);
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DEBUG(
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const MCSymbolRefExpr::VariantKind Kind = Target.getSymA()->getKind();
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MCSymbolRefExpr::VariantKind Kind2;
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Kind2 = Target.getSymB() ? Target.getSymB()->getKind() :
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MCSymbolRefExpr::VK_None;
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dbgs() << "considering symbol "
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<< Section.getSectionName() << "/"
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<< Symbol.getName() << "/"
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<< " Rel:" << (unsigned)RelocType
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<< " Kind: " << (int)Kind << "/" << (int)Kind2
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<< " Tmp:"
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<< Symbol.isAbsolute() << "/" << Symbol.isDefined() << "/"
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<< Symbol.isVariable() << "/" << Symbol.isTemporary()
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<< " Counts:" << PCRelCount << "/" << NonPCRelCount << "\n");
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if (IsPCRel) { ++PCRelCount;
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switch (RelocType) {
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default:
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// Most relocation types are emitted as explicit symbols
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InNormalSection =
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StringSwitch<bool>(Section.getSectionName())
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.Case(".data.rel.ro.local", false)
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.Case(".data.rel", false)
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.Case(".bss", false)
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.Default(true);
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EmitThisSym = true;
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break;
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case ELF::R_ARM_ABS32:
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// But things get strange with R_ARM_ABS32
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// In this case, most things that go in .rodata show up
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// as section relative relocations
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InNormalSection =
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StringSwitch<bool>(Section.getSectionName())
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.Case(".data.rel.ro.local", false)
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.Case(".data.rel", false)
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.Case(".rodata", false)
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.Case(".bss", false)
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.Default(true);
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EmitThisSym = false;
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break;
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}
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} else {
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NonPCRelCount++;
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InNormalSection =
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StringSwitch<bool>(Section.getSectionName())
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.Case(".data.rel.ro.local", false)
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.Case(".rodata", false)
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.Case(".data.rel", false)
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.Case(".bss", false)
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.Default(true);
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switch (RelocType) {
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default: EmitThisSym = true; break;
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case ELF::R_ARM_ABS32: EmitThisSym = false; break;
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case ELF::R_ARM_PREL31: EmitThisSym = false; break;
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}
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}
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if (EmitThisSym)
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return &Symbol;
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if (! Symbol.isTemporary() && InNormalSection) {
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return &Symbol;
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}
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return NULL;
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}
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// Need to examine the Fixup when determining whether to
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// emit the relocation as an explicit symbol or as a section relative
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// offset
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unsigned ARMELFObjectWriter::GetRelocType(const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel,
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bool IsRelocWithSymbol,
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int64_t Addend) const {
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return GetRelocTypeInner(Target, Fixup, IsPCRel);
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}
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unsigned ARMELFObjectWriter::GetRelocTypeInner(const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel) const {
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MCSymbolRefExpr::VariantKind Modifier = Target.isAbsolute() ?
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MCSymbolRefExpr::VK_None : Target.getSymA()->getKind();
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unsigned Type = 0;
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if (IsPCRel) {
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switch ((unsigned)Fixup.getKind()) {
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default: llvm_unreachable("Unimplemented");
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case FK_Data_4:
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switch (Modifier) {
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default: llvm_unreachable("Unsupported Modifier");
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case MCSymbolRefExpr::VK_None:
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Type = ELF::R_ARM_REL32;
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break;
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case MCSymbolRefExpr::VK_TLSGD:
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llvm_unreachable("unimplemented");
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case MCSymbolRefExpr::VK_GOTTPOFF:
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Type = ELF::R_ARM_TLS_IE32;
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break;
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}
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break;
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case ARM::fixup_arm_blx:
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case ARM::fixup_arm_uncondbl:
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switch (Modifier) {
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case MCSymbolRefExpr::VK_PLT:
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Type = ELF::R_ARM_PLT32;
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break;
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default:
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Type = ELF::R_ARM_CALL;
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break;
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}
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break;
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case ARM::fixup_arm_condbl:
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case ARM::fixup_arm_condbranch:
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case ARM::fixup_arm_uncondbranch:
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Type = ELF::R_ARM_JUMP24;
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break;
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case ARM::fixup_t2_condbranch:
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case ARM::fixup_t2_uncondbranch:
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Type = ELF::R_ARM_THM_JUMP24;
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break;
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case ARM::fixup_arm_movt_hi16:
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case ARM::fixup_arm_movt_hi16_pcrel:
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Type = ELF::R_ARM_MOVT_PREL;
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break;
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case ARM::fixup_arm_movw_lo16:
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case ARM::fixup_arm_movw_lo16_pcrel:
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Type = ELF::R_ARM_MOVW_PREL_NC;
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break;
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case ARM::fixup_t2_movt_hi16:
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case ARM::fixup_t2_movt_hi16_pcrel:
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Type = ELF::R_ARM_THM_MOVT_PREL;
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break;
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case ARM::fixup_t2_movw_lo16:
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case ARM::fixup_t2_movw_lo16_pcrel:
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Type = ELF::R_ARM_THM_MOVW_PREL_NC;
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break;
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case ARM::fixup_arm_thumb_bl:
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case ARM::fixup_arm_thumb_blx:
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Type = ELF::R_ARM_THM_CALL;
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break;
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}
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} else {
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switch ((unsigned)Fixup.getKind()) {
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default: llvm_unreachable("invalid fixup kind!");
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case FK_Data_4:
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switch (Modifier) {
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default: llvm_unreachable("Unsupported Modifier");
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case MCSymbolRefExpr::VK_ARM_NONE:
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Type = ELF::R_ARM_NONE;
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break;
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case MCSymbolRefExpr::VK_GOT:
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Type = ELF::R_ARM_GOT_BREL;
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break;
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case MCSymbolRefExpr::VK_TLSGD:
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Type = ELF::R_ARM_TLS_GD32;
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break;
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case MCSymbolRefExpr::VK_TPOFF:
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Type = ELF::R_ARM_TLS_LE32;
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break;
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case MCSymbolRefExpr::VK_GOTTPOFF:
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Type = ELF::R_ARM_TLS_IE32;
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break;
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case MCSymbolRefExpr::VK_None:
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Type = ELF::R_ARM_ABS32;
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break;
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case MCSymbolRefExpr::VK_GOTOFF:
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Type = ELF::R_ARM_GOTOFF32;
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break;
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case MCSymbolRefExpr::VK_ARM_TARGET1:
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Type = ELF::R_ARM_TARGET1;
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break;
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case MCSymbolRefExpr::VK_ARM_TARGET2:
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Type = ELF::R_ARM_TARGET2;
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break;
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case MCSymbolRefExpr::VK_ARM_PREL31:
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Type = ELF::R_ARM_PREL31;
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break;
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}
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break;
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case ARM::fixup_arm_ldst_pcrel_12:
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case ARM::fixup_arm_pcrel_10:
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case ARM::fixup_arm_adr_pcrel_12:
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case ARM::fixup_arm_thumb_bl:
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case ARM::fixup_arm_thumb_cb:
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case ARM::fixup_arm_thumb_cp:
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case ARM::fixup_arm_thumb_br:
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llvm_unreachable("Unimplemented");
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case ARM::fixup_arm_condbranch:
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case ARM::fixup_arm_uncondbranch:
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Type = ELF::R_ARM_JUMP24;
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break;
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case ARM::fixup_arm_movt_hi16:
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Type = ELF::R_ARM_MOVT_ABS;
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break;
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case ARM::fixup_arm_movw_lo16:
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Type = ELF::R_ARM_MOVW_ABS_NC;
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break;
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case ARM::fixup_t2_movt_hi16:
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Type = ELF::R_ARM_THM_MOVT_ABS;
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break;
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case ARM::fixup_t2_movw_lo16:
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Type = ELF::R_ARM_THM_MOVW_ABS_NC;
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break;
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}
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}
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return Type;
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}
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MCObjectWriter *llvm::createARMELFObjectWriter(raw_ostream &OS,
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uint8_t OSABI) {
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MCELFObjectTargetWriter *MOTW = new ARMELFObjectWriter(OSABI);
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return createELFObjectWriter(MOTW, OS, /*IsLittleEndian=*/true);
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}
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