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This commit adds a weak variant of the cmpxchg operation, as described in C++11. A cmpxchg instruction with this modifier is permitted to fail to store, even if the comparison indicated it should. As a result, cmpxchg instructions must return a flag indicating success in addition to their original iN value loaded. Thus, for uniformity *all* cmpxchg instructions now return "{ iN, i1 }". The second flag is 1 when the store succeeded. At the DAG level, a new ATOMIC_CMP_SWAP_WITH_SUCCESS node has been added as the natural representation for the new cmpxchg instructions. It is a strong cmpxchg. By default this gets Expanded to the existing ATOMIC_CMP_SWAP during Legalization, so existing backends should see no change in behaviour. If they wish to deal with the enhanced node instead, they can call setOperationAction on it. Beware: as a node with 2 results, it cannot be selected from TableGen. Currently, no use is made of the extra information provided in this patch. Test updates are almost entirely adapting the input IR to the new scheme. Summary for out of tree users: ------------------------------ + Legacy Bitcode files are upgraded during read. + Legacy assembly IR files will be invalid. + Front-ends must adapt to different type for "cmpxchg". + Backends should be unaffected by default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210903 91177308-0d34-0410-b5e6-96231b3b80d8
539 lines
19 KiB
C++
539 lines
19 KiB
C++
//===-- Instruction.cpp - Implement the Instruction class -----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the Instruction class for the IR library.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/IR/Instruction.h"
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#include "llvm/IR/CallSite.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/LeakDetector.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/Operator.h"
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#include "llvm/IR/Type.h"
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using namespace llvm;
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Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps,
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Instruction *InsertBefore)
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: User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) {
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// Make sure that we get added to a basicblock
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LeakDetector::addGarbageObject(this);
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// If requested, insert this instruction into a basic block...
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if (InsertBefore) {
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assert(InsertBefore->getParent() &&
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"Instruction to insert before is not in a basic block!");
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InsertBefore->getParent()->getInstList().insert(InsertBefore, this);
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}
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}
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const DataLayout *Instruction::getDataLayout() const {
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return getParent()->getDataLayout();
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}
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Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps,
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BasicBlock *InsertAtEnd)
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: User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) {
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// Make sure that we get added to a basicblock
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LeakDetector::addGarbageObject(this);
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// append this instruction into the basic block
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assert(InsertAtEnd && "Basic block to append to may not be NULL!");
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InsertAtEnd->getInstList().push_back(this);
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}
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// Out of line virtual method, so the vtable, etc has a home.
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Instruction::~Instruction() {
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assert(!Parent && "Instruction still linked in the program!");
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if (hasMetadataHashEntry())
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clearMetadataHashEntries();
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}
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void Instruction::setParent(BasicBlock *P) {
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if (getParent()) {
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if (!P) LeakDetector::addGarbageObject(this);
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} else {
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if (P) LeakDetector::removeGarbageObject(this);
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}
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Parent = P;
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}
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void Instruction::removeFromParent() {
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getParent()->getInstList().remove(this);
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}
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void Instruction::eraseFromParent() {
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getParent()->getInstList().erase(this);
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}
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/// insertBefore - Insert an unlinked instructions into a basic block
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/// immediately before the specified instruction.
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void Instruction::insertBefore(Instruction *InsertPos) {
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InsertPos->getParent()->getInstList().insert(InsertPos, this);
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}
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/// insertAfter - Insert an unlinked instructions into a basic block
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/// immediately after the specified instruction.
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void Instruction::insertAfter(Instruction *InsertPos) {
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InsertPos->getParent()->getInstList().insertAfter(InsertPos, this);
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}
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/// moveBefore - Unlink this instruction from its current basic block and
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/// insert it into the basic block that MovePos lives in, right before
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/// MovePos.
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void Instruction::moveBefore(Instruction *MovePos) {
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MovePos->getParent()->getInstList().splice(MovePos,getParent()->getInstList(),
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this);
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}
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/// Set or clear the unsafe-algebra flag on this instruction, which must be an
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/// operator which supports this flag. See LangRef.html for the meaning of this
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/// flag.
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void Instruction::setHasUnsafeAlgebra(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setHasUnsafeAlgebra(B);
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}
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/// Set or clear the NoNaNs flag on this instruction, which must be an operator
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/// which supports this flag. See LangRef.html for the meaning of this flag.
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void Instruction::setHasNoNaNs(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setHasNoNaNs(B);
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}
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/// Set or clear the no-infs flag on this instruction, which must be an operator
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/// which supports this flag. See LangRef.html for the meaning of this flag.
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void Instruction::setHasNoInfs(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setHasNoInfs(B);
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}
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/// Set or clear the no-signed-zeros flag on this instruction, which must be an
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/// operator which supports this flag. See LangRef.html for the meaning of this
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/// flag.
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void Instruction::setHasNoSignedZeros(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setHasNoSignedZeros(B);
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}
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/// Set or clear the allow-reciprocal flag on this instruction, which must be an
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/// operator which supports this flag. See LangRef.html for the meaning of this
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/// flag.
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void Instruction::setHasAllowReciprocal(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setHasAllowReciprocal(B);
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}
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/// Convenience function for setting all the fast-math flags on this
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/// instruction, which must be an operator which supports these flags. See
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/// LangRef.html for the meaning of these flats.
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void Instruction::setFastMathFlags(FastMathFlags FMF) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setFastMathFlags(FMF);
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}
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/// Determine whether the unsafe-algebra flag is set.
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bool Instruction::hasUnsafeAlgebra() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->hasUnsafeAlgebra();
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}
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/// Determine whether the no-NaNs flag is set.
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bool Instruction::hasNoNaNs() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->hasNoNaNs();
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}
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/// Determine whether the no-infs flag is set.
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bool Instruction::hasNoInfs() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->hasNoInfs();
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}
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/// Determine whether the no-signed-zeros flag is set.
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bool Instruction::hasNoSignedZeros() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->hasNoSignedZeros();
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}
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/// Determine whether the allow-reciprocal flag is set.
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bool Instruction::hasAllowReciprocal() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->hasAllowReciprocal();
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}
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/// Convenience function for getting all the fast-math flags, which must be an
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/// operator which supports these flags. See LangRef.html for the meaning of
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/// these flats.
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FastMathFlags Instruction::getFastMathFlags() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->getFastMathFlags();
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}
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/// Copy I's fast-math flags
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void Instruction::copyFastMathFlags(const Instruction *I) {
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setFastMathFlags(I->getFastMathFlags());
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}
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const char *Instruction::getOpcodeName(unsigned OpCode) {
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switch (OpCode) {
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// Terminators
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case Ret: return "ret";
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case Br: return "br";
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case Switch: return "switch";
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case IndirectBr: return "indirectbr";
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case Invoke: return "invoke";
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case Resume: return "resume";
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case Unreachable: return "unreachable";
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// Standard binary operators...
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case Add: return "add";
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case FAdd: return "fadd";
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case Sub: return "sub";
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case FSub: return "fsub";
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case Mul: return "mul";
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case FMul: return "fmul";
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case UDiv: return "udiv";
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case SDiv: return "sdiv";
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case FDiv: return "fdiv";
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case URem: return "urem";
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case SRem: return "srem";
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case FRem: return "frem";
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// Logical operators...
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case And: return "and";
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case Or : return "or";
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case Xor: return "xor";
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// Memory instructions...
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case Alloca: return "alloca";
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case Load: return "load";
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case Store: return "store";
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case AtomicCmpXchg: return "cmpxchg";
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case AtomicRMW: return "atomicrmw";
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case Fence: return "fence";
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case GetElementPtr: return "getelementptr";
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// Convert instructions...
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case Trunc: return "trunc";
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case ZExt: return "zext";
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case SExt: return "sext";
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case FPTrunc: return "fptrunc";
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case FPExt: return "fpext";
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case FPToUI: return "fptoui";
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case FPToSI: return "fptosi";
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case UIToFP: return "uitofp";
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case SIToFP: return "sitofp";
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case IntToPtr: return "inttoptr";
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case PtrToInt: return "ptrtoint";
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case BitCast: return "bitcast";
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case AddrSpaceCast: return "addrspacecast";
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// Other instructions...
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case ICmp: return "icmp";
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case FCmp: return "fcmp";
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case PHI: return "phi";
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case Select: return "select";
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case Call: return "call";
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case Shl: return "shl";
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case LShr: return "lshr";
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case AShr: return "ashr";
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case VAArg: return "va_arg";
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case ExtractElement: return "extractelement";
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case InsertElement: return "insertelement";
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case ShuffleVector: return "shufflevector";
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case ExtractValue: return "extractvalue";
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case InsertValue: return "insertvalue";
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case LandingPad: return "landingpad";
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default: return "<Invalid operator> ";
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}
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}
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/// Return true if both instructions have the same special state
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/// This must be kept in sync with lib/Transforms/IPO/MergeFunctions.cpp.
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static bool haveSameSpecialState(const Instruction *I1, const Instruction *I2,
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bool IgnoreAlignment = false) {
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assert(I1->getOpcode() == I2->getOpcode() &&
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"Can not compare special state of different instructions");
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if (const LoadInst *LI = dyn_cast<LoadInst>(I1))
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return LI->isVolatile() == cast<LoadInst>(I2)->isVolatile() &&
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(LI->getAlignment() == cast<LoadInst>(I2)->getAlignment() ||
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IgnoreAlignment) &&
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LI->getOrdering() == cast<LoadInst>(I2)->getOrdering() &&
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LI->getSynchScope() == cast<LoadInst>(I2)->getSynchScope();
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if (const StoreInst *SI = dyn_cast<StoreInst>(I1))
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return SI->isVolatile() == cast<StoreInst>(I2)->isVolatile() &&
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(SI->getAlignment() == cast<StoreInst>(I2)->getAlignment() ||
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IgnoreAlignment) &&
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SI->getOrdering() == cast<StoreInst>(I2)->getOrdering() &&
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SI->getSynchScope() == cast<StoreInst>(I2)->getSynchScope();
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if (const CmpInst *CI = dyn_cast<CmpInst>(I1))
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return CI->getPredicate() == cast<CmpInst>(I2)->getPredicate();
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if (const CallInst *CI = dyn_cast<CallInst>(I1))
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return CI->isTailCall() == cast<CallInst>(I2)->isTailCall() &&
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CI->getCallingConv() == cast<CallInst>(I2)->getCallingConv() &&
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CI->getAttributes() == cast<CallInst>(I2)->getAttributes();
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if (const InvokeInst *CI = dyn_cast<InvokeInst>(I1))
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return CI->getCallingConv() == cast<InvokeInst>(I2)->getCallingConv() &&
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CI->getAttributes() ==
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cast<InvokeInst>(I2)->getAttributes();
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if (const InsertValueInst *IVI = dyn_cast<InsertValueInst>(I1))
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return IVI->getIndices() == cast<InsertValueInst>(I2)->getIndices();
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if (const ExtractValueInst *EVI = dyn_cast<ExtractValueInst>(I1))
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return EVI->getIndices() == cast<ExtractValueInst>(I2)->getIndices();
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if (const FenceInst *FI = dyn_cast<FenceInst>(I1))
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return FI->getOrdering() == cast<FenceInst>(I2)->getOrdering() &&
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FI->getSynchScope() == cast<FenceInst>(I2)->getSynchScope();
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if (const AtomicCmpXchgInst *CXI = dyn_cast<AtomicCmpXchgInst>(I1))
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return CXI->isVolatile() == cast<AtomicCmpXchgInst>(I2)->isVolatile() &&
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CXI->isWeak() == cast<AtomicCmpXchgInst>(I2)->isWeak() &&
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CXI->getSuccessOrdering() ==
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cast<AtomicCmpXchgInst>(I2)->getSuccessOrdering() &&
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CXI->getFailureOrdering() ==
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cast<AtomicCmpXchgInst>(I2)->getFailureOrdering() &&
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CXI->getSynchScope() == cast<AtomicCmpXchgInst>(I2)->getSynchScope();
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if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(I1))
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return RMWI->getOperation() == cast<AtomicRMWInst>(I2)->getOperation() &&
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RMWI->isVolatile() == cast<AtomicRMWInst>(I2)->isVolatile() &&
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RMWI->getOrdering() == cast<AtomicRMWInst>(I2)->getOrdering() &&
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RMWI->getSynchScope() == cast<AtomicRMWInst>(I2)->getSynchScope();
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return true;
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}
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/// isIdenticalTo - Return true if the specified instruction is exactly
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/// identical to the current one. This means that all operands match and any
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/// extra information (e.g. load is volatile) agree.
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bool Instruction::isIdenticalTo(const Instruction *I) const {
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return isIdenticalToWhenDefined(I) &&
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SubclassOptionalData == I->SubclassOptionalData;
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}
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/// isIdenticalToWhenDefined - This is like isIdenticalTo, except that it
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/// ignores the SubclassOptionalData flags, which specify conditions
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/// under which the instruction's result is undefined.
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bool Instruction::isIdenticalToWhenDefined(const Instruction *I) const {
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if (getOpcode() != I->getOpcode() ||
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getNumOperands() != I->getNumOperands() ||
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getType() != I->getType())
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return false;
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// If both instructions have no operands, they are identical.
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if (getNumOperands() == 0 && I->getNumOperands() == 0)
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return haveSameSpecialState(this, I);
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// We have two instructions of identical opcode and #operands. Check to see
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// if all operands are the same.
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if (!std::equal(op_begin(), op_end(), I->op_begin()))
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return false;
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if (const PHINode *thisPHI = dyn_cast<PHINode>(this)) {
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const PHINode *otherPHI = cast<PHINode>(I);
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return std::equal(thisPHI->block_begin(), thisPHI->block_end(),
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otherPHI->block_begin());
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}
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return haveSameSpecialState(this, I);
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}
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// isSameOperationAs
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// This should be kept in sync with isEquivalentOperation in
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// lib/Transforms/IPO/MergeFunctions.cpp.
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bool Instruction::isSameOperationAs(const Instruction *I,
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unsigned flags) const {
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bool IgnoreAlignment = flags & CompareIgnoringAlignment;
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bool UseScalarTypes = flags & CompareUsingScalarTypes;
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if (getOpcode() != I->getOpcode() ||
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getNumOperands() != I->getNumOperands() ||
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(UseScalarTypes ?
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getType()->getScalarType() != I->getType()->getScalarType() :
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getType() != I->getType()))
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return false;
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// We have two instructions of identical opcode and #operands. Check to see
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// if all operands are the same type
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for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
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if (UseScalarTypes ?
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getOperand(i)->getType()->getScalarType() !=
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I->getOperand(i)->getType()->getScalarType() :
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getOperand(i)->getType() != I->getOperand(i)->getType())
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return false;
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return haveSameSpecialState(this, I, IgnoreAlignment);
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}
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/// isUsedOutsideOfBlock - Return true if there are any uses of I outside of the
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/// specified block. Note that PHI nodes are considered to evaluate their
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/// operands in the corresponding predecessor block.
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bool Instruction::isUsedOutsideOfBlock(const BasicBlock *BB) const {
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for (const Use &U : uses()) {
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// PHI nodes uses values in the corresponding predecessor block. For other
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// instructions, just check to see whether the parent of the use matches up.
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const Instruction *I = cast<Instruction>(U.getUser());
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const PHINode *PN = dyn_cast<PHINode>(I);
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if (!PN) {
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if (I->getParent() != BB)
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return true;
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continue;
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}
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if (PN->getIncomingBlock(U) != BB)
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return true;
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}
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return false;
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}
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/// mayReadFromMemory - Return true if this instruction may read memory.
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///
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bool Instruction::mayReadFromMemory() const {
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switch (getOpcode()) {
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default: return false;
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case Instruction::VAArg:
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case Instruction::Load:
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case Instruction::Fence: // FIXME: refine definition of mayReadFromMemory
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case Instruction::AtomicCmpXchg:
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case Instruction::AtomicRMW:
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return true;
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case Instruction::Call:
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return !cast<CallInst>(this)->doesNotAccessMemory();
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case Instruction::Invoke:
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return !cast<InvokeInst>(this)->doesNotAccessMemory();
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case Instruction::Store:
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return !cast<StoreInst>(this)->isUnordered();
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}
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}
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/// mayWriteToMemory - Return true if this instruction may modify memory.
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///
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bool Instruction::mayWriteToMemory() const {
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switch (getOpcode()) {
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default: return false;
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case Instruction::Fence: // FIXME: refine definition of mayWriteToMemory
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case Instruction::Store:
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case Instruction::VAArg:
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case Instruction::AtomicCmpXchg:
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case Instruction::AtomicRMW:
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return true;
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case Instruction::Call:
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return !cast<CallInst>(this)->onlyReadsMemory();
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case Instruction::Invoke:
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return !cast<InvokeInst>(this)->onlyReadsMemory();
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case Instruction::Load:
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return !cast<LoadInst>(this)->isUnordered();
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}
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}
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bool Instruction::mayThrow() const {
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if (const CallInst *CI = dyn_cast<CallInst>(this))
|
|
return !CI->doesNotThrow();
|
|
return isa<ResumeInst>(this);
|
|
}
|
|
|
|
bool Instruction::mayReturn() const {
|
|
if (const CallInst *CI = dyn_cast<CallInst>(this))
|
|
return !CI->doesNotReturn();
|
|
return true;
|
|
}
|
|
|
|
/// isAssociative - Return true if the instruction is associative:
|
|
///
|
|
/// Associative operators satisfy: x op (y op z) === (x op y) op z
|
|
///
|
|
/// In LLVM, the Add, Mul, And, Or, and Xor operators are associative.
|
|
///
|
|
bool Instruction::isAssociative(unsigned Opcode) {
|
|
return Opcode == And || Opcode == Or || Opcode == Xor ||
|
|
Opcode == Add || Opcode == Mul;
|
|
}
|
|
|
|
bool Instruction::isAssociative() const {
|
|
unsigned Opcode = getOpcode();
|
|
if (isAssociative(Opcode))
|
|
return true;
|
|
|
|
switch (Opcode) {
|
|
case FMul:
|
|
case FAdd:
|
|
return cast<FPMathOperator>(this)->hasUnsafeAlgebra();
|
|
default:
|
|
return false;
|
|
}
|
|
}
|
|
|
|
/// isCommutative - Return true if the instruction is commutative:
|
|
///
|
|
/// Commutative operators satisfy: (x op y) === (y op x)
|
|
///
|
|
/// In LLVM, these are the associative operators, plus SetEQ and SetNE, when
|
|
/// applied to any type.
|
|
///
|
|
bool Instruction::isCommutative(unsigned op) {
|
|
switch (op) {
|
|
case Add:
|
|
case FAdd:
|
|
case Mul:
|
|
case FMul:
|
|
case And:
|
|
case Or:
|
|
case Xor:
|
|
return true;
|
|
default:
|
|
return false;
|
|
}
|
|
}
|
|
|
|
/// isIdempotent - Return true if the instruction is idempotent:
|
|
///
|
|
/// Idempotent operators satisfy: x op x === x
|
|
///
|
|
/// In LLVM, the And and Or operators are idempotent.
|
|
///
|
|
bool Instruction::isIdempotent(unsigned Opcode) {
|
|
return Opcode == And || Opcode == Or;
|
|
}
|
|
|
|
/// isNilpotent - Return true if the instruction is nilpotent:
|
|
///
|
|
/// Nilpotent operators satisfy: x op x === Id,
|
|
///
|
|
/// where Id is the identity for the operator, i.e. a constant such that
|
|
/// x op Id === x and Id op x === x for all x.
|
|
///
|
|
/// In LLVM, the Xor operator is nilpotent.
|
|
///
|
|
bool Instruction::isNilpotent(unsigned Opcode) {
|
|
return Opcode == Xor;
|
|
}
|
|
|
|
Instruction *Instruction::clone() const {
|
|
Instruction *New = clone_impl();
|
|
New->SubclassOptionalData = SubclassOptionalData;
|
|
if (!hasMetadata())
|
|
return New;
|
|
|
|
// Otherwise, enumerate and copy over metadata from the old instruction to the
|
|
// new one.
|
|
SmallVector<std::pair<unsigned, MDNode*>, 4> TheMDs;
|
|
getAllMetadataOtherThanDebugLoc(TheMDs);
|
|
for (const auto &MD : TheMDs)
|
|
New->setMetadata(MD.first, MD.second);
|
|
|
|
New->setDebugLoc(getDebugLoc());
|
|
return New;
|
|
}
|