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e50c8c1f81
When asserts are enabled, this adds a verification pass for PPC counter-loop formation. Unfortunately, without sacrificing code quality, there is no better way of forming counter-based loops except at the (late) IR level. This means that we need to recognize, at the IR level, anything which might turn into a function call (or indirect branch). Because this is currently a finite set of things, and because SelectionDAG lowering is basic-block local, this can be done. Nevertheless, it is fragile, and failure results in a miscompile. This verification pass checks that all (reachable) counter-based branches are dominated by a loop mtctr instruction, and that no instructions in between clobber the counter register. If these conditions are not satisfied, then an ICE will be triggered. In short, this is to help us sleep better at night. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182295 91177308-0d34-0410-b5e6-96231b3b80d8
95 lines
3.0 KiB
C++
95 lines
3.0 KiB
C++
//===-- PPC.h - Top-level interface for PowerPC Target ----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in the LLVM
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// PowerPC back-end.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_POWERPC_H
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#define LLVM_TARGET_POWERPC_H
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#include "MCTargetDesc/PPCMCTargetDesc.h"
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#include <string>
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// GCC #defines PPC on Linux but we use it as our namespace name
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#undef PPC
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namespace llvm {
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class PPCTargetMachine;
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class FunctionPass;
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class ImmutablePass;
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class JITCodeEmitter;
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class MachineInstr;
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class AsmPrinter;
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class MCInst;
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FunctionPass *createPPCCTRLoops(PPCTargetMachine &TM);
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#ifndef NDEBUG
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FunctionPass *createPPCCTRLoopsVerify();
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#endif
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FunctionPass *createPPCEarlyReturnPass();
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FunctionPass *createPPCBranchSelectionPass();
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FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
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FunctionPass *createPPCJITCodeEmitterPass(PPCTargetMachine &TM,
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JITCodeEmitter &MCE);
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void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
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AsmPrinter &AP, bool isDarwin);
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/// \brief Creates an PPC-specific Target Transformation Info pass.
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ImmutablePass *createPPCTargetTransformInfoPass(const PPCTargetMachine *TM);
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namespace PPCII {
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/// Target Operand Flag enum.
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enum TOF {
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//===------------------------------------------------------------------===//
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// PPC Specific MachineOperand flags.
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MO_NO_FLAG,
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/// MO_DARWIN_STUB - On a symbol operand "FOO", this indicates that the
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/// reference is actually to the "FOO$stub" symbol. This is used for calls
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/// and jumps to external functions on Tiger and earlier.
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MO_DARWIN_STUB = 1,
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/// MO_PIC_FLAG - If this bit is set, the symbol reference is relative to
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/// the function's picbase, e.g. lo16(symbol-picbase).
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MO_PIC_FLAG = 2,
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/// MO_NLP_FLAG - If this bit is set, the symbol reference is actually to
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/// the non_lazy_ptr for the global, e.g. lo16(symbol$non_lazy_ptr-picbase).
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MO_NLP_FLAG = 4,
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/// MO_NLP_HIDDEN_FLAG - If this bit is set, the symbol reference is to a
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/// symbol with hidden visibility. This causes a different kind of
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/// non-lazy-pointer to be generated.
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MO_NLP_HIDDEN_FLAG = 8,
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/// The next are not flags but distinct values.
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MO_ACCESS_MASK = 0xf0,
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/// MO_LO16, MO_HA16 - lo16(symbol) and ha16(symbol)
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MO_LO16 = 1 << 4,
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MO_HA16 = 2 << 4,
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MO_TPREL16_HA = 3 << 4,
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MO_TPREL16_LO = 4 << 4,
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/// These values identify relocations on immediates folded
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/// into memory operations.
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MO_DTPREL16_LO = 5 << 4,
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MO_TLSLD16_LO = 6 << 4,
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MO_TOC16_LO = 7 << 4
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};
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} // end namespace PPCII
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} // end namespace llvm;
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#endif
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