mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-25 00:29:20 +00:00
67db74e02c
Summary: - If only two registers are passed to a three-register operation, then the first argument is both source and destination register. - If a non-register is passed as the last argument, generate the immediate version of the instruction. Also mark DADD commutative and add scheduling information (to the generic scheduler), and implement DSUB. Patch by David Chisnall His work was sponsored by: DARPA, AFRL CC: theraven Differential Revision: http://llvm-reviews.chandlerc.com/D3148 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204605 91177308-0d34-0410-b5e6-96231b3b80d8
142 lines
6.0 KiB
ArmAsm
142 lines
6.0 KiB
ArmAsm
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
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# Check that the assembler can handle the documented syntax
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# for arithmetic and logical instructions.
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#------------------------------------------------------------------------------
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# Logical instructions
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#------------------------------------------------------------------------------
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# CHECK: and $9, $6, $7 # encoding: [0x24,0x48,0xc7,0x00]
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# CHECK: andi $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x30]
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# CHECK: andi $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x30]
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# CHECK: andi $9, $9, 17767 # encoding: [0x67,0x45,0x29,0x31]
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# CHECK: clo $6, $7 # encoding: [0x21,0x30,0xe6,0x70]
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# CHECK: clz $6, $7 # encoding: [0x20,0x30,0xe6,0x70]
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# CHECK: ins $19, $9, 6, 7 # encoding: [0x84,0x61,0x33,0x7d]
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# CHECK: nor $9, $6, $7 # encoding: [0x27,0x48,0xc7,0x00]
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# CHECK: or $3, $3, $5 # encoding: [0x25,0x18,0x65,0x00]
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# CHECK: ori $4, $5, 17767 # encoding: [0x67,0x45,0xa4,0x34]
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# CHECK: ori $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x34]
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# CHECK: ori $11, $11, 128 # encoding: [0x80,0x00,0x6b,0x35]
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# CHECK: rotr $9, $6, 7 # encoding: [0xc2,0x49,0x26,0x00]
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# CHECK: rotrv $9, $6, $7 # encoding: [0x46,0x48,0xe6,0x00]
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# CHECK: sll $4, $3, 7 # encoding: [0xc0,0x21,0x03,0x00]
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# CHECK: sllv $2, $3, $5 # encoding: [0x04,0x10,0xa3,0x00]
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# CHECK: slt $3, $3, $5 # encoding: [0x2a,0x18,0x65,0x00]
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# CHECK: slti $3, $3, 103 # encoding: [0x67,0x00,0x63,0x28]
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# CHECK: slti $3, $3, 103 # encoding: [0x67,0x00,0x63,0x28]
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# CHECK: sltiu $3, $3, 103 # encoding: [0x67,0x00,0x63,0x2c]
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# CHECK: sltu $3, $3, $5 # encoding: [0x2b,0x18,0x65,0x00]
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# CHECK: sra $4, $3, 7 # encoding: [0xc3,0x21,0x03,0x00]
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# CHECK: srav $2, $3, $5 # encoding: [0x07,0x10,0xa3,0x00]
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# CHECK: srl $4, $3, 7 # encoding: [0xc2,0x21,0x03,0x00]
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# CHECK: srlv $2, $3, $5 # encoding: [0x06,0x10,0xa3,0x00]
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# CHECK: xor $3, $3, $5 # encoding: [0x26,0x18,0x65,0x00]
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# CHECK: xori $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x38]
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# CHECK: xori $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x38]
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# CHECK: xori $11, $11, 12 # encoding: [0x0c,0x00,0x6b,0x39]
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# CHECK: wsbh $6, $7 # encoding: [0xa0,0x30,0x07,0x7c]
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# CHECK: not $7, $8 # encoding: [0x27,0x38,0x00,0x01]
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and $9, $6, $7
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and $9, $6, 17767
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andi $9, $6, 17767
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andi $9, 17767
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clo $6, $7
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clz $6, $7
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ins $19, $9, 6,7
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nor $9, $6, $7
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or $3, $3, $5
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or $4, $5, 17767
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ori $9, $6, 17767
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ori $11, 128
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rotr $9, $6, 7
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rotrv $9, $6, $7
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sll $4, $3, 7
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sllv $2, $3, $5
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slt $3, $3, $5
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slt $3, $3, 103
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slti $3, $3, 103
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sltiu $3, $3, 103
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sltu $3, $3, $5
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sra $4, $3, 7
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srav $2, $3, $5
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srl $4, $3, 7
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srlv $2, $3, $5
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xor $3, $3, $5
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xor $9, $6, 17767
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xori $9, $6, 17767
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xori $11, 12
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wsbh $6, $7
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not $7 ,$8
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#------------------------------------------------------------------------------
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# Arithmetic instructions
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#------------------------------------------------------------------------------
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# CHECK: add $9, $6, $7 # encoding: [0x20,0x48,0xc7,0x00]
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# CHECK: addi $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x20]
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# CHECK: addiu $9, $6, -15001 # encoding: [0x67,0xc5,0xc9,0x24]
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# CHECK: addi $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x20]
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# CHECK: addi $9, $9, 17767 # encoding: [0x67,0x45,0x29,0x21]
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# CHECK: addiu $9, $6, -15001 # encoding: [0x67,0xc5,0xc9,0x24]
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# CHECK: addiu $11, $11, 40 # encoding: [0x28,0x00,0x6b,0x25]
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# CHECK: addu $9, $6, $7 # encoding: [0x21,0x48,0xc7,0x00]
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# CHECK: madd $6, $7 # encoding: [0x00,0x00,0xc7,0x70]
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# CHECK: maddu $6, $7 # encoding: [0x01,0x00,0xc7,0x70]
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# CHECK: msub $6, $7 # encoding: [0x04,0x00,0xc7,0x70]
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# CHECK: msubu $6, $7 # encoding: [0x05,0x00,0xc7,0x70]
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# CHECK: mult $3, $5 # encoding: [0x18,0x00,0x65,0x00]
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# CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00]
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# CHECK: sub $9, $6, $7 # encoding: [0x22,0x48,0xc7,0x00]
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# CHECK: addi $sp, $sp, -56 # encoding: [0xc8,0xff,0xbd,0x23]
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# CHECK: subu $4, $3, $5 # encoding: [0x23,0x20,0x65,0x00]
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# CHECK: addiu $sp, $sp, -40 # encoding: [0xd8,0xff,0xbd,0x27]
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# CHECK: neg $6, $7 # encoding: [0x22,0x30,0x07,0x00]
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# CHECK: negu $6, $7 # encoding: [0x23,0x30,0x07,0x00]
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# CHECK: move $7, $8 # encoding: [0x21,0x38,0x00,0x01]
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# CHECK: .set push
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# CHECK: .set mips32r2
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# CHECK: rdhwr $5, $29
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# CHECK: .set pop # encoding: [0x3b,0xe8,0x05,0x7c]
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add $9,$6,$7
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add $9,$6,17767
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addu $9,$6,-15001
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addi $9,$6,17767
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addi $9,17767
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addiu $9,$6,-15001
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addiu $11,40
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addu $9,$6,$7
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madd $6,$7
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maddu $6,$7
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msub $6,$7
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msubu $6,$7
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mult $3,$5
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multu $3,$5
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sub $9,$6,$7
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sub $sp,$sp,56
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subu $4,$3,$5
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subu $sp,$sp,40
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neg $6,$7
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negu $6,$7
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move $7,$8
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rdhwr $5, $29
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#------------------------------------------------------------------------------
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# Shortcuts for arithmetic instructions
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#------------------------------------------------------------------------------
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# CHECK: add $9, $9, $3 # encoding: [0x20,0x48,0x23,0x01]
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# CHECK: addu $9, $9, $3 # encoding: [0x21,0x48,0x23,0x01]
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# CHECK: addi $9, $9, 10 # encoding: [0x0a,0x00,0x29,0x21]
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# CHECK: addiu $9, $9, 10 # encoding: [0x0a,0x00,0x29,0x25]
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# CHECK: sub $9, $9, $3 # encoding: [0x22,0x48,0x23,0x01]
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# CHECK: subu $9, $9, $3 # encoding: [0x23,0x48,0x23,0x01]
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# CHECK: addi $9, $9, -10 # encoding: [0xf6,0xff,0x29,0x21]
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# CHECK: addiu $9, $9, -10 # encoding: [0xf6,0xff,0x29,0x25]
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add $9, $3
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addu $9, $3
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add $9, 10
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addu $9, 10
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sub $9, $3
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subu $9, $3
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sub $9, 10
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subu $9, 10
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