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24ed4de261
http://reviews.llvm.org/D9891 Following up on the VSX single precision loads and stores added earlier, this adds support for elementary arithmetic operations on single precision values in VSX registers. These instructions utilize the new VSSRC register class. Instructions added: xsaddsp xsdivsp xsmulsp xsresp xsrsqrtesp xssqrtsp xssubsp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237937 91177308-0d34-0410-b5e6-96231b3b80d8 |
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| .. | ||
| dcbt.s | ||
| deprecated-p7.s | ||
| htm.s | ||
| lcomm.s | ||
| lit.local.cfg | ||
| ppc32-ba.s | ||
| ppc64-abiversion.s | ||
| ppc64-encoding-4xx.s | ||
| ppc64-encoding-6xx.s | ||
| ppc64-encoding-bookII.s | ||
| ppc64-encoding-bookIII.s | ||
| ppc64-encoding-e500.s | ||
| ppc64-encoding-ext.s | ||
| ppc64-encoding-fp.s | ||
| ppc64-encoding-p8vector.s | ||
| ppc64-encoding-spe.s | ||
| ppc64-encoding-vmx.s | ||
| ppc64-encoding.s | ||
| ppc64-errors.s | ||
| ppc64-fixup-apply.s | ||
| ppc64-fixup-explicit.s | ||
| ppc64-fixups.s | ||
| ppc64-initial-cfa.s | ||
| ppc64-localentry-error1.s | ||
| ppc64-localentry-error2.s | ||
| ppc64-localentry.s | ||
| ppc64-operands.s | ||
| ppc64-regs.s | ||
| ppc64-relocs-01.s | ||
| ppc64-tls-relocs-01.s | ||
| ppc-llong.s | ||
| ppc-machine.s | ||
| ppc-nop.s | ||
| ppc-reloc.s | ||
| ppc-word.s | ||
| qpx.s | ||
| tls-gd-obj.s | ||
| tls-ie-obj.s | ||
| tls-ld-obj.s | ||
| vsx.s | ||