Jiangning Liu 258115258f Implement AArch64 Neon instruction set Bitwise Extract. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194118 91177308-0d34-0410-b5e6-96231b3b80d8		2013-11-06 02:25:49 +00:00
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AArch64	Implement AArch64 Neon instruction set Bitwise Extract.	2013-11-06 02:25:49 +00:00
ARM	[ARM] NEON instructions were erroneously decoded from certain invalid encodings	2013-10-30 18:10:09 +00:00
Mips	Support for microMIPS branch instructions.	2013-11-04 14:53:22 +00:00
SystemZ	[SystemZ] Add comparisons of high words and memory	2013-10-01 15:00:44 +00:00
X86	Add disassembler support for SSE4.1 register/register form of PEXTRW. There is a shorter encoding that was part of SSE2, but a memory form was added in SSE4.1. This is the register form of that encoding.	2013-10-14 01:42:32 +00:00
XCore	[tests] Cleanup initialization of test suffixes.	2013-08-16 00:37:11 +00:00