Andrew Trick 4f7d60c1ea AArch64: Safely handle the incoming sret call argument. ... This adds a safe interface to the machine independent InputArg struct for accessing the index of the original (IR-level) argument. When a non-native return type is lowered, we generate the hidden machine-level sret argument on-the-fly. Before this fix, we were representing this argument as OrigArgIndex == 0, which is an outright lie. In particular this crashed in the AArch64 backend where we actually try to access the type of the original argument. Now we use a sentinel value for machine arguments that have no original argument index. AArch64, ARM, Mips, and PPC now check for this case before accessing the original argument. Fixes <rdar://19792160> Null pointer assertion in AArch64TargetLowering git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229413 91177308-0d34-0410-b5e6-96231b3b80d8		2015-02-16 18:10:47 +00:00
..
AArch64	AArch64: Safely handle the incoming sret call argument.	2015-02-16 18:10:47 +00:00
ARM	[SimplifyCFG] Swap to using TargetTransformInfo for cost	2015-02-11 12:15:41 +00:00
BPF
CPP
Generic
Hexagon
Inputs
Mips	[mips][microMIPS] Delay slot filler: Replace the microMIPS JR with the JRC	2015-02-13 17:51:27 +00:00
MSP430
NVPTX
PowerPC	[CodeGenPrepare] Removed duplicate logic. SimplifyCFG already knows how to speculate calls to cttz/ctlz.	2015-02-13 14:15:48 +00:00
R600	R600/SI: Implement correct f64 fdiv	2015-02-14 04:30:08 +00:00
SPARC
SystemZ
Thumb
Thumb2	Make buildbots better.	2015-02-11 12:24:09 +00:00
X86	[x86] Add a generic unpack-targeted lowering technique. This can be used	2015-02-16 12:28:18 +00:00
XCore