llvm-6502/lib/Target/ARM/ARMRegisterInfo.cpp
Bill Wendling 57148c166a Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183488 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-07 05:54:19 +00:00

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//===-- ARMRegisterInfo.cpp - ARM Register Information --------------------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains the ARM implementation of the TargetRegisterInfo class.
//
//===----------------------------------------------------------------------===//
#include "ARMRegisterInfo.h"
#include "ARM.h"
#include "ARMBaseInstrInfo.h"
using namespace llvm;
void ARMRegisterInfo::anchor() { }
ARMRegisterInfo::ARMRegisterInfo(const ARMSubtarget &sti)
: ARMBaseRegisterInfo(sti) {
}