llvm-6502/test/CodeGen/Mips/cconv/memory-layout.ll
Eric Christopher fcd3c4065d Move the Mips target to storing the ABI in the TargetMachine rather
than on MipsSubtargetInfo.

This required a bit of massaging in the MC level to handle this since
MC is a) largely a collection of disparate classes with no hierarchy,
and b) there's no overarching equivalent to the TargetMachine, instead
only the subtarget via MCSubtargetInfo (which is the base class of
TargetSubtargetInfo).

We're now storing the ABI in both the TargetMachine level and in the
MC level because the AsmParser and the TargetStreamer both need to
know what ABI we have to parse assembly and emit objects. The target
streamer has a pointer to the one in the asm parser and is updated
when the asm parser is created. This is fragile as the FIXME comment
notes, but shouldn't be a problem in practice since we always
create an asm parser before attempting to emit object code via the
assembler. The TargetMachine now contains the ABI so that the DataLayout
can be constructed dependent upon ABI.

All testcases have been updated to use the -target-abi command line
flag so that we can set the ABI without using a subtarget feature.

Should be no change visible externally here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227102 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 17:33:46 +00:00

141 lines
4.4 KiB
LLVM

; RUN: llc -march=mips < %s | FileCheck --check-prefix=ALL --check-prefix=O32 %s
; RUN: llc -march=mipsel < %s | FileCheck --check-prefix=ALL --check-prefix=O32 %s
; RUN-TODO: llc -march=mips64 -target-abi o32 < %s | FileCheck --check-prefix=ALL --check-prefix=O32 %s
; RUN-TODO: llc -march=mips64el -target-abi o32 < %s | FileCheck --check-prefix=ALL --check-prefix=O32 %s
; RUN: llc -march=mips64 -target-abi n32 < %s | FileCheck --check-prefix=ALL --check-prefix=N32 %s
; RUN: llc -march=mips64el -target-abi n32 < %s | FileCheck --check-prefix=ALL --check-prefix=N32 %s
; RUN: llc -march=mips64 -target-abi n64 < %s | FileCheck --check-prefix=ALL --check-prefix=N64 %s
; RUN: llc -march=mips64el -target-abi n64 < %s | FileCheck --check-prefix=ALL --check-prefix=N64 %s
; Test the memory layout for all ABI's and byte orders as specified by section
; 4 of MD00305 (MIPS ABIs Described).
; Bitfields are not covered since they are not available as a type in LLVM IR.
;
; The assembly directives deal with endianness so we don't need to account for
; that.
; Deliberately request alignments that are too small for the target so we get
; the minimum alignment instead of the preferred alignment.
@byte = global i8 1, align 1
@halfword = global i16 258, align 1
@word = global i32 16909060, align 1
@float = global float 1.0, align 1
@dword = global i64 283686952306183, align 1
@double = global double 1.0, align 1
@pointer = global i8* @byte
; ALL-NOT: .align
; ALL-LABEL: byte:
; ALL: .byte 1
; ALL: .size byte, 1
; ALL: .align 1
; ALL-LABEL: halfword:
; ALL: .2byte 258
; ALL: .size halfword, 2
; ALL: .align 2
; ALL-LABEL: word:
; ALL: .4byte 16909060
; ALL: .size word, 4
; ALL: .align 2
; ALL-LABEL: float:
; ALL: .4byte 1065353216
; ALL: .size float, 4
; ALL: .align 3
; ALL-LABEL: dword:
; ALL: .8byte 283686952306183
; ALL: .size dword, 8
; ALL: .align 3
; ALL-LABEL: double:
; ALL: .8byte 4607182418800017408
; ALL: .size double, 8
; O32: .align 2
; N32: .align 2
; N64: .align 3
; ALL-LABEL: pointer:
; O32: .4byte byte
; O32: .size pointer, 4
; N32: .4byte byte
; N32: .size pointer, 4
; N64: .8byte byte
; N64: .size pointer, 8
@byte_array = global [2 x i8] [i8 1, i8 2], align 1
@halfword_array = global [2 x i16] [i16 1, i16 2], align 1
@word_array = global [2 x i32] [i32 1, i32 2], align 1
@float_array = global [2 x float] [float 1.0, float 2.0], align 1
@dword_array = global [2 x i64] [i64 1, i64 2], align 1
@double_array = global [2 x double] [double 1.0, double 2.0], align 1
@pointer_array = global [2 x i8*] [i8* @byte, i8* @byte]
; ALL-NOT: .align
; ALL-LABEL: byte_array:
; ALL: .ascii "\001\002"
; ALL: .size byte_array, 2
; ALL: .align 1
; ALL-LABEL: halfword_array:
; ALL: .2byte 1
; ALL: .2byte 2
; ALL: .size halfword_array, 4
; ALL: .align 2
; ALL-LABEL: word_array:
; ALL: .4byte 1
; ALL: .4byte 2
; ALL: .size word_array, 8
; ALL: .align 2
; ALL-LABEL: float_array:
; ALL: .4byte 1065353216
; ALL: .4byte 1073741824
; ALL: .size float_array, 8
; ALL: .align 3
; ALL-LABEL: dword_array:
; ALL: .8byte 1
; ALL: .8byte 2
; ALL: .size dword_array, 16
; ALL: .align 3
; ALL-LABEL: double_array:
; ALL: .8byte 4607182418800017408
; ALL: .8byte 4611686018427387904
; ALL: .size double_array, 16
; O32: .align 2
; N32: .align 2
; N64: .align 3
; ALL-LABEL: pointer_array:
; O32: .4byte byte
; O32: .4byte byte
; O32: .size pointer_array, 8
; N32: .4byte byte
; N32: .4byte byte
; N32: .size pointer_array, 8
; N64: .8byte byte
; N64: .8byte byte
; N64: .size pointer_array, 16
%mixed = type { i8, double, i16 }
@mixed = global %mixed { i8 1, double 1.0, i16 515 }, align 1
; ALL: .align 3
; ALL-LABEL: mixed:
; ALL: .byte 1
; ALL: .space 7
; ALL: .8byte 4607182418800017408
; ALL: .2byte 515
; ALL: .space 6
; ALL: .size mixed, 24
; Bitfields are not available in LLVM IR so we can't test them here.