llvm-6502/test/CodeGen
Tom Stellard b8fee4f1d9 R600/SI: Remove assertion in SIInstrInfo::areLoadsFromSameBasePtr()
Added a FIXME coment instead, we need to handle the case where the
two DS instructions being compared have different numbers of operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219236 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-07 21:09:20 +00:00
..
AArch64 [FastISel][AArch64] Teach the address computation code to also fold sign-/zero-extends. 2014-10-07 03:40:06 +00:00
ARM Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
CPP
Generic Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Hexagon Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Inputs Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Mips [mips] Return {f128} correctly for N32/N64. 2014-10-07 09:29:59 +00:00
MSP430
NVPTX Revert r216862 due to a performance regression 2014-10-01 15:22:13 +00:00
PowerPC Fast-math fold: x / (y * sqrt(z)) -> x * (rsqrt(z) / y) 2014-10-06 19:31:18 +00:00
R600 R600/SI: Remove assertion in SIInstrInfo::areLoadsFromSameBasePtr() 2014-10-07 21:09:20 +00:00
SPARC Add back tests for empty function in SPARC and PowerPC. 2014-09-15 22:11:07 +00:00
SystemZ
Thumb Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Thumb2 [ARM] Allow selecting VRINT[APMXZR] and VCVT[BT] instructions for FPv5 2014-10-01 13:13:18 +00:00
X86 [DAGCombine] Remove SIGN_EXTEND-related inf-loop 2014-10-06 20:19:47 +00:00
XCore Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00