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https://github.com/c64scene-ar/llvm-6502.git
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5440f2198d
This changes the ABI used on 32-bit x86 for passing vector arguments. Historically, clang passes the first 4 vector arguments in-register, and additional vector arguments on the stack, regardless of platform. That is different from the behavior of gcc, icc, and msvc, all of which pass only the first 3 arguments in-register. The 3-register convention is documented, unofficially, in Agner's calling convention guide, and, officially, in the recently released version 1.0 of the i386 psABI. Darwin is kept as is because the OS X ABI Function Call Guide explicitly documents the current (4-register) behavior. This fixes PR21510 Differential revision: http://reviews.llvm.org/D9644 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237682 91177308-0d34-0410-b5e6-96231b3b80d8
85 lines
2.3 KiB
LLVM
85 lines
2.3 KiB
LLVM
; RUN: llc < %s -march=x86 -mcpu=corei7 | FileCheck %s
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; RUN: llc < %s -march=x86 -mcpu=core-avx-i | FileCheck %s --check-prefix=AVX
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target triple = "i686-pc-linux-gnu"
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define <1 x float> @test1(<1 x double> %x) nounwind {
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; CHECK-LABEL: test1:
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; CHECK: # BB#0:
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; CHECK-NEXT: pushl %eax
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; CHECK-NEXT: movsd {{[0-9]+}}(%esp), %xmm0
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; CHECK-NEXT: cvtsd2ss %xmm0, %xmm0
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; CHECK-NEXT: movss %xmm0, (%esp)
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; CHECK-NEXT: flds (%esp)
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; CHECK-NEXT: popl %eax
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; CHECK-NEXT: retl
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;
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; AVX-LABEL: test1:
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; AVX: # BB#0:
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; AVX-NEXT: pushl %eax
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; AVX-NEXT: vmovsd {{[0-9]+}}(%esp), %xmm0
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; AVX-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0
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; AVX-NEXT: vmovss %xmm0, (%esp)
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; AVX-NEXT: flds (%esp)
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; AVX-NEXT: popl %eax
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; AVX-NEXT: retl
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%y = fptrunc <1 x double> %x to <1 x float>
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ret <1 x float> %y
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}
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define <2 x float> @test2(<2 x double> %x) nounwind {
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; CHECK-LABEL: test2:
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; CHECK: # BB#0:
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; CHECK-NEXT: cvtpd2ps %xmm0, %xmm0
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; CHECK-NEXT: retl
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;
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; AVX-LABEL: test2:
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; AVX: # BB#0:
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; AVX-NEXT: vcvtpd2ps %xmm0, %xmm0
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; AVX-NEXT: retl
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%y = fptrunc <2 x double> %x to <2 x float>
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ret <2 x float> %y
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}
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define <4 x float> @test3(<4 x double> %x) nounwind {
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; CHECK-LABEL: test3:
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; CHECK: # BB#0:
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; CHECK-NEXT: cvtpd2ps %xmm1, %xmm1
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; CHECK-NEXT: cvtpd2ps %xmm0, %xmm0
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; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; CHECK-NEXT: retl
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;
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; AVX-LABEL: test3:
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; AVX: # BB#0:
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; AVX-NEXT: vcvtpd2psy %ymm0, %xmm0
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; AVX-NEXT: vzeroupper
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; AVX-NEXT: retl
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%y = fptrunc <4 x double> %x to <4 x float>
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ret <4 x float> %y
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}
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define <8 x float> @test4(<8 x double> %x) nounwind {
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; CHECK-LABEL: test4:
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; CHECK: # BB#0:
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; CHECK-NEXT: subl $12, %esp
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; CHECK-NEXT: cvtpd2ps %xmm1, %xmm1
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; CHECK-NEXT: cvtpd2ps %xmm0, %xmm0
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; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; CHECK-NEXT: cvtpd2ps %xmm2, %xmm1
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; CHECK-NEXT: cvtpd2ps 16(%esp), %xmm2
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; CHECK-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0]
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; CHECK-NEXT: addl $12, %esp
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; CHECK-NEXT: retl
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;
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; AVX-LABEL: test4:
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; AVX: # BB#0:
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; AVX-NEXT: vcvtpd2psy %ymm0, %xmm0
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; AVX-NEXT: vcvtpd2psy %ymm1, %xmm1
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; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; AVX-NEXT: retl
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%y = fptrunc <8 x double> %x to <8 x float>
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ret <8 x float> %y
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}
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