Pranav Bhandarkar 8aa138c122 Use the relationship models infrastructure to add two relations - getPredOpcode ... and getPredNewOpcode. The first relates non predicated instructions with their predicated forms and the second relates predicated instructions with their predicate-new forms. Patch by Jyotsna Verma! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167243 91177308-0d34-0410-b5e6-96231b3b80d8		2012-11-01 19:13:23 +00:00
..
InstPrinter
MCTargetDesc	Fix alignment of .comm and .lcomm on mingw32.	2012-09-07 21:08:01 +00:00
TargetInfo
CMakeLists.txt
Hexagon.h
Hexagon.td
HexagonAsmPrinter.cpp	Move TargetData to DataLayout.	2012-10-08 16:38:25 +00:00
HexagonAsmPrinter.h
HexagonCallingConv.td
HexagonCallingConvLower.cpp	Move TargetData to DataLayout.	2012-10-08 16:38:25 +00:00
HexagonCallingConvLower.h
HexagonCFGOptimizer.cpp
HexagonExpandPredSpillCode.cpp
HexagonFrameLowering.cpp
HexagonFrameLowering.h
HexagonHardwareLoops.cpp
HexagonImmediates.td
HexagonInstrFormats.td	Use the relationship models infrastructure to add two relations - getPredOpcode	2012-11-01 19:13:23 +00:00
HexagonInstrFormatsV4.td
HexagonInstrInfo.cpp	Use the relationship models infrastructure to add two relations - getPredOpcode	2012-11-01 19:13:23 +00:00
HexagonInstrInfo.h
HexagonInstrInfo.td	Use the relationship models infrastructure to add two relations - getPredOpcode	2012-11-01 19:13:23 +00:00
HexagonInstrInfoV3.td
HexagonInstrInfoV4.td
HexagonInstrInfoV5.td
HexagonIntrinsics.td
HexagonIntrinsicsDerived.td
HexagonIntrinsicsV3.td
HexagonIntrinsicsV4.td
HexagonIntrinsicsV5.td
HexagonISelDAGToDAG.cpp
HexagonISelLowering.cpp	TargetLowering interface to set/get minimum block entries for jump tables.	2012-09-25 20:35:36 +00:00
HexagonISelLowering.h
HexagonMachineFunctionInfo.h
HexagonMachineScheduler.cpp	misched: Use the TargetSchedModel interface wherever possible.	2012-10-10 05:43:09 +00:00
HexagonMachineScheduler.h	misched: Use the TargetSchedModel interface wherever possible.	2012-10-10 05:43:09 +00:00
HexagonMCInst.h
HexagonMCInstLower.cpp
HexagonNewValueJump.cpp
HexagonPeephole.cpp	LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the	2012-09-05 16:01:40 +00:00
HexagonRegisterInfo.cpp
HexagonRegisterInfo.h
HexagonRegisterInfo.td
HexagonRemoveSZExtArgs.cpp	Create enums for the different attributes.	2012-10-09 07:45:08 +00:00
HexagonSchedule.td
HexagonScheduleV4.td
HexagonSelectCCInfo.td
HexagonSelectionDAGInfo.cpp
HexagonSelectionDAGInfo.h
HexagonSplitTFRCondSets.cpp
HexagonSubtarget.cpp
HexagonSubtarget.h
HexagonTargetMachine.cpp	Implement a basic VectorTargetTransformInfo interface to be used by the loop and bb vectorizers for modeling the cost of instructions.	2012-10-24 17:22:41 +00:00
HexagonTargetMachine.h	Reapply the TargerTransformInfo changes, minus the changes to LSR and Lowerinvoke.	2012-10-18 23:22:48 +00:00
HexagonTargetObjectFile.cpp	Move TargetData to DataLayout.	2012-10-08 16:38:25 +00:00
HexagonTargetObjectFile.h
HexagonVarargsCallingConvention.h	Move TargetData to DataLayout.	2012-10-08 16:38:25 +00:00
HexagonVLIWPacketizer.cpp
LLVMBuild.txt
Makefile