llvm-6502/lib
Andrew Trick 2661b411cc I'm introducing a new machine model to simultaneously allow simple
subtarget CPU descriptions and support new features of
MachineScheduler.

MachineModel has three categories of data:
1) Basic properties for coarse grained instruction cost model.
2) Scheduler Read/Write resources for simple per-opcode and operand cost model (TBD).
3) Instruction itineraties for detailed per-cycle reservation tables.

These will all live side-by-side. Any subtarget can use any
combination of them. Instruction itineraries will not change in the
near term. In the long run, I expect them to only be relevant for
in-order VLIW machines that have complex contraints and require a
precise scheduling/bundling model. Once itineraries are only actively
used by VLIW-ish targets, they could be replaced by something more
appropriate for those targets.

This tablegen backend rewrite sets things up for introducing
MachineModel type #2: per opcode/operand cost model.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159891 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-07 04:00:00 +00:00
..
Analysis PHINode::hasConstantValue(): return undef if the PHI is fully recursive. 2012-07-03 21:15:40 +00:00
Archive Include cstdio in a few place that depended on getting it transitively through StringExtras.h 2012-03-23 11:35:30 +00:00
AsmParser Extend the IL for selecting TLS models (PR9788) 2012-06-23 11:37:03 +00:00
Bitcode llvm/lib: [CMake] Add explicit dependency to intrinsics_gen. 2012-06-24 13:32:01 +00:00
CodeGen I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
DebugInfo Fix a bug in DebugInfo lib, extend a comment for one of the methods 2012-07-04 09:42:54 +00:00
ExecutionEngine Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and 2012-06-28 00:05:13 +00:00
Linker Extend the IL for selecting TLS models (PR9788) 2012-06-23 11:37:03 +00:00
MC I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
Object Added accessors for getting coff_relocation info 2012-06-18 19:47:16 +00:00
Support Enable automatic GCC<->LLVM intrinsic translation for mips. 2012-06-28 19:09:53 +00:00
TableGen Emit TableGen's header comment with C-style comments, so it can be used from C89 code. 2012-06-19 17:04:16 +00:00
Target I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
Transforms teach instcombine to remove allocated buffers even if there are stores, memcpy/memmove/memset, and objectsize users. 2012-07-06 23:09:25 +00:00
VMCore Use the DebugInfo wrappers instead of mucking about with the MDNode directly. 2012-07-07 00:52:35 +00:00
CMakeLists.txt
LLVMBuild.txt LLVMBuild: Introduce a common section which currently has a list of the 2011-12-12 22:45:54 +00:00
Makefile