Jim Grosbach e1cf5902ec ARM SRS instruction parsing, diassembly and encoding support. ... Fix the instruction encoding for operands. Refactor mode to use explicit instruction definitions per FIXME to be more consistent with loads/stores. Fix disassembler accordingly. Add tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136509 91177308-0d34-0410-b5e6-96231b3b80d8		2011-07-29 20:26:09 +00:00
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ARMDisassembler.cpp	Fix typo in the comment.	2011-04-19 23:58:52 +00:00
ARMDisassembler.h	Better error handling of invalid IT mask '0000', instead of just asserting.	2010-04-19 23:02:58 +00:00
ARMDisassemblerCore.cpp	ARM SRS instruction parsing, diassembly and encoding support.	2011-07-29 20:26:09 +00:00
ARMDisassemblerCore.h	Get rid of the extraneous GPR operand on so_reg_imm operands, which in turn necessitates a lot of changes to related bits.	2011-07-21 23:38:37 +00:00
CMakeLists.txt	Rewrite the CMake build to use explicit dependencies between libraries,	2011-07-29 00:14:25 +00:00
Makefile	Re-enable ARM/Thumb disassembler and add a workaround for a memcpy() call in	2010-04-07 20:53:12 +00:00
ThumbDisassemblerCore.h	ARM parsing and encoding of SBFX and UBFX.	2011-07-27 21:09:25 +00:00