llvm-6502/test/MC
Quentin Colombet d64ee4455a ARM: Correct printing of pre-indexed operands.
According to the ARM reference manual, constant offsets are mandatory for pre-indexed addressing modes.
The MC disassembler was not obeying this when the offset is 0.
It was producing instructions like: str r0, [r1]!.
Correct syntax is: str r0, [r1, #0]!.

This change modifies the dumping of operands so that the offset is always printed, regardless of its value, when pre-indexed addressing mode is used.

Patch by Mihail Popa <Mihail.Popa@arm.com>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179398 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 18:47:25 +00:00
..
AArch64 AArch64: use full triple for ELF tests 2013-04-12 12:54:58 +00:00
ARM ARM: Correct printing of pre-indexed operands. 2013-04-12 18:47:25 +00:00
AsmParser Replace coff-/elf-dump with llvm-readobj 2013-04-12 04:06:46 +00:00
COFF Replace coff-/elf-dump with llvm-readobj 2013-04-12 04:06:46 +00:00
Disassembler ARM: Correct printing of pre-indexed operands. 2013-04-12 18:47:25 +00:00
ELF Replace coff-/elf-dump with llvm-readobj 2013-04-12 04:06:46 +00:00
MachO
Markup
MBlaze
Mips Replace coff-/elf-dump with llvm-readobj 2013-04-12 04:06:46 +00:00
PowerPC Replace coff-/elf-dump with llvm-readobj 2013-04-12 04:06:46 +00:00
X86