llvm-6502/lib/Target/Alpha
Andrew Lenharth a697b8d83d Readme
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35533 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-31 15:05:44 +00:00
..
.cvsignore
Alpha.h
Alpha.td FTOIT and ITOFT are bit converts, and if we drop 21264s, are always available 2007-01-24 21:09:16 +00:00
AlphaAsmPrinter.cpp Well this isn't as ugly and it works better. At least gcc bootstraps again 2007-02-13 23:41:16 +00:00
AlphaBranchSelector.cpp
AlphaCodeEmitter.cpp
AlphaInstrFormats.td
AlphaInstrInfo.cpp
AlphaInstrInfo.h
AlphaInstrInfo.td FTOIT and ITOFT are bit converts, and if we drop 21264s, are always available 2007-01-24 21:09:16 +00:00
AlphaISelDAGToDAG.cpp FTOIT and ITOFT are bit converts, and if we drop 21264s, are always available 2007-01-24 21:09:16 +00:00
AlphaISelLowering.cpp switch TargetLowering::getConstraintType to take the entire constraint, 2007-03-25 02:14:49 +00:00
AlphaISelLowering.h switch TargetLowering::getConstraintType to take the entire constraint, 2007-03-25 02:14:49 +00:00
AlphaJITInfo.cpp
AlphaJITInfo.h
AlphaLLRP.cpp
AlphaRegisterInfo.cpp Added MRegisterInfo hook to re-materialize an instruction. 2007-03-20 08:09:38 +00:00
AlphaRegisterInfo.h Added MRegisterInfo hook to re-materialize an instruction. 2007-03-20 08:09:38 +00:00
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp FTOIT and ITOFT are bit converts, and if we drop 21264s, are always available 2007-01-24 21:09:16 +00:00
AlphaSubtarget.h FTOIT and ITOFT are bit converts, and if we drop 21264s, are always available 2007-01-24 21:09:16 +00:00
AlphaTargetAsmInfo.cpp
AlphaTargetAsmInfo.h
AlphaTargetMachine.cpp Added new method to add a "simple" code emitter. That is, to only add 2007-02-08 01:38:33 +00:00
AlphaTargetMachine.h Added new method to add a "simple" code emitter. That is, to only add 2007-02-08 01:38:33 +00:00
Makefile
README.txt Readme 2007-03-31 15:05:44 +00:00

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html