llvm-6502/test/MC
Mehdi Amini 26d628d6ce Change the fast-isel-abort option from bool to int to enable "levels"
Summary:
Currently fast-isel-abort will only abort for regular instructions,
and just warn for function calls, terminators, function arguments.
There is already fast-isel-abort-args but nothing for calls and
terminators.

This change turns the fast-isel-abort options into an integer option,
so that multiple levels of strictness can be defined.
This will help no being surprised when the "abort" option indeed does
not abort, and enables the possibility to write test that verifies
that no intrinsics are forgotten by fast-isel.

Reviewers: resistor, echristo

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D7941

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230775 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 18:32:11 +00:00
..
AArch64 Fix some unnoticed/unwanted behavior change from r222319. 2015-02-04 03:10:03 +00:00
ARM Change the fast-isel-abort option from bool to int to enable "levels" 2015-02-27 18:32:11 +00:00
AsmParser MC: Don't emit .no_dead_strip on targets which don't support it 2014-12-24 04:11:42 +00:00
COFF Fix quoting of #pragma comment for MS compat, LLVM part. 2015-02-16 11:57:17 +00:00
Disassembler [PowerPC] Add support for the QPX vector instruction set 2015-02-25 01:06:45 +00:00
ELF MC: Allow multiple comma-separated expressions on the .uleb128 directive. 2015-02-19 20:24:04 +00:00
Hexagon [Hexagon] Updating predicate register transfers and adding tstbit to allow select selection. Updating ll tests with predicate transfers that previously had nop encodings. 2014-12-09 18:16:49 +00:00
MachO Learn that __DATA,__objc_classrefs is not atomized via symbols. 2015-02-12 23:11:59 +00:00
Markup
Mips Replace obsolete -mattr=n64 command line option with -target-abi=n64. No functional changes. 2015-02-26 12:29:48 +00:00
PowerPC [PowerPC] Add support for the QPX vector instruction set 2015-02-25 01:06:45 +00:00
R600 R600/SI: Add a stub GCNTargetMachine 2015-01-06 18:00:21 +00:00
Sparc
SystemZ [SystemZ] Support all TLS access models - MC part 2015-02-18 09:11:36 +00:00
X86 [MC] Use the non-EH register mapping in the debug_frame section. 2015-02-26 19:48:07 +00:00