mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-26 06:29:20 +00:00
00e08fcaa0
Add header guards to files that were missing guards. Remove #endif comments as they don't seem common in LLVM (we can easily add them back if we decide they're useful) Changes made by clang-tidy with minor tweaks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215558 91177308-0d34-0410-b5e6-96231b3b80d8
83 lines
3.0 KiB
C++
83 lines
3.0 KiB
C++
//=-- Hexagon.h - Top-level interface for Hexagon representation --*- C++ -*-=//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This file contains the entry points for global functions defined in the LLVM
|
|
// Hexagon back-end.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGON_H
|
|
#define LLVM_LIB_TARGET_HEXAGON_HEXAGON_H
|
|
|
|
#include "MCTargetDesc/HexagonMCTargetDesc.h"
|
|
#include "llvm/Target/TargetLowering.h"
|
|
#include "llvm/Target/TargetMachine.h"
|
|
|
|
namespace llvm {
|
|
class FunctionPass;
|
|
class ModulePass;
|
|
class TargetMachine;
|
|
class MachineInstr;
|
|
class HexagonMCInst;
|
|
class HexagonAsmPrinter;
|
|
class HexagonTargetMachine;
|
|
class raw_ostream;
|
|
|
|
FunctionPass *createHexagonISelDag(HexagonTargetMachine &TM,
|
|
CodeGenOpt::Level OptLevel);
|
|
FunctionPass *createHexagonDelaySlotFillerPass(const TargetMachine &TM);
|
|
FunctionPass *createHexagonFPMoverPass(const TargetMachine &TM);
|
|
FunctionPass *createHexagonRemoveExtendArgs(const HexagonTargetMachine &TM);
|
|
FunctionPass *createHexagonCFGOptimizer(const HexagonTargetMachine &TM);
|
|
|
|
FunctionPass *createHexagonSplitTFRCondSets(const HexagonTargetMachine &TM);
|
|
FunctionPass *createHexagonSplitConst32AndConst64(
|
|
const HexagonTargetMachine &TM);
|
|
FunctionPass *createHexagonExpandPredSpillCode(
|
|
const HexagonTargetMachine &TM);
|
|
FunctionPass *createHexagonHardwareLoops();
|
|
FunctionPass *createHexagonPeephole();
|
|
FunctionPass *createHexagonFixupHwLoops();
|
|
FunctionPass *createHexagonNewValueJump();
|
|
FunctionPass *createHexagonCopyToCombine();
|
|
FunctionPass *createHexagonPacketizer();
|
|
FunctionPass *createHexagonNewValueJump();
|
|
|
|
/* TODO: object output.
|
|
MCCodeEmitter *createHexagonMCCodeEmitter(const Target &,
|
|
const TargetMachine &TM,
|
|
MCContext &Ctx);
|
|
*/
|
|
/* TODO: assembler input.
|
|
TargetAsmBackend *createHexagonAsmBackend(const Target &,
|
|
const std::string &);
|
|
*/
|
|
void HexagonLowerToMC(const MachineInstr *MI, HexagonMCInst &MCI,
|
|
HexagonAsmPrinter &AP);
|
|
} // end namespace llvm;
|
|
|
|
#define Hexagon_POINTER_SIZE 4
|
|
|
|
#define Hexagon_PointerSize (Hexagon_POINTER_SIZE)
|
|
#define Hexagon_PointerSize_Bits (Hexagon_POINTER_SIZE * 8)
|
|
#define Hexagon_WordSize Hexagon_PointerSize
|
|
#define Hexagon_WordSize_Bits Hexagon_PointerSize_Bits
|
|
|
|
// allocframe saves LR and FP on stack before allocating
|
|
// a new stack frame. This takes 8 bytes.
|
|
#define HEXAGON_LRFP_SIZE 8
|
|
|
|
// Normal instruction size (in bytes).
|
|
#define HEXAGON_INSTR_SIZE 4
|
|
|
|
// Maximum number of words and instructions in a packet.
|
|
#define HEXAGON_PACKET_SIZE 4
|
|
|
|
#endif
|