llvm-6502/test/CodeGen/ARM
Rafael Espindola 27185190e6 add floating point registers
implement SINT_TO_FP


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30673 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-29 21:20:16 +00:00
..
argaddr.ll add a "load effective address" 2006-08-17 17:09:40 +00:00
bits.ll implement shl and sra 2006-09-08 17:36:23 +00:00
branch.ll add the SETULT condition code 2006-09-03 13:19:16 +00:00
call.ll implement function calling of functions with up to 4 arguments 2006-07-25 20:17:20 +00:00
constants.ll if a constant can't be an immediate, add it to the constant pool 2006-09-21 11:29:52 +00:00
dg.exp
fp.ll add floating point registers 2006-09-29 21:20:16 +00:00
hello.ll use a 'register pressure reducing' scheduler 2006-08-04 12:48:42 +00:00
ldr.ll select code like 2006-08-14 19:01:24 +00:00
long.ll if a constant can't be an immediate, add it to the constant pool 2006-09-21 11:29:52 +00:00
mul.ll Implement a MachineFunctionPass to fix the mul instruction 2006-09-19 15:49:25 +00:00
ret_arg1.ll added some tests for argument passing 2006-06-01 22:01:25 +00:00
ret_arg2.ll added some tests for argument passing 2006-06-01 22:01:25 +00:00
ret_arg3.ll added some tests for argument passing 2006-06-01 22:01:25 +00:00
ret_arg4.ll added some tests for argument passing 2006-06-01 22:01:25 +00:00
ret_arg5.ll initial implementation of ARMRegisterInfo::eliminateFrameIndex 2006-06-18 00:08:07 +00:00
ret_void.ll added some tests for argument passing 2006-06-01 22:01:25 +00:00
select.ll more condition codes 2006-09-21 13:06:26 +00:00
vargs2.ll test case for varargs functions 2006-08-25 17:57:36 +00:00
vargs.ll fix the spill code 2006-08-09 16:41:12 +00:00