Alex Lorenz 2744189c46 MIR Serialization: Serialize the frame setup machine instruction flag. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242491 91177308-0d34-0410-b5e6-96231b3b80d8		2015-07-17 00:24:15 +00:00
..
AArch64	AArch64: make inexact signalling on round Darwin-specific	2015-07-16 21:30:21 +00:00
AMDGPU	AMDPGU/SI: Negative offsets aren't allowed in MUBUF's vaddr operand	2015-07-16 19:40:09 +00:00
ARM	Fix __builtin_setjmp in combination with sjlj exception handling.	2015-07-16 22:34:16 +00:00
BPF
CPP
Generic	llc: Add a 'run-pass' option.	2015-07-06 17:44:26 +00:00
Hexagon	[Hexagon] Generate instructions for operations on predicate registers	2015-07-14 19:30:21 +00:00
Inputs
Mips	[SDAG] Optimize unordered comparison in soft-float mode (patch by Anton Nadolskiy)	2015-07-15 08:39:35 +00:00
MIR	MIR Serialization: Serialize the frame setup machine instruction flag.	2015-07-17 00:24:15 +00:00
MSP430
NVPTX	Correct lowering of memmove in NVPTX	2015-07-16 16:27:19 +00:00
PowerPC	[PowerPC] v4i32 is a VSRCRegClass	2015-07-16 21:14:07 +00:00
SPARC	[SPARC] Cleanup handling of the Y/ASR registers.	2015-07-08 16:25:12 +00:00
SystemZ
Thumb
Thumb2	Arm: Don't define a label twice with two setjmps in a function.	2015-07-16 22:34:20 +00:00
WebAssembly	[WebAssembly] Create a CodeGen unittest directory.	2015-07-06 23:14:57 +00:00
WinEH	[WinEH] Strip the \01 character from the __CxxFrameHandler3 thunk name	2015-07-13 17:55:14 +00:00
X86	[X86][SSE] Added nounwind attribute to vector shift tests.	2015-07-16 21:14:26 +00:00
XCore