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https://github.com/c64scene-ar/llvm-6502.git
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ce638c8248
As a follow-up to r158719, remove PPCRegisterInfo::avoidWriteAfterWrite. Jakob pointed out in response to r158719 that this callback is currently unused and so this has no effect (and the speedups that I thought that I had observed as a result of implementing this function must have been noise). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177228 91177308-0d34-0410-b5e6-96231b3b80d8
86 lines
2.8 KiB
C++
86 lines
2.8 KiB
C++
//===-- PPCRegisterInfo.h - PowerPC Register Information Impl ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the PowerPC implementation of the TargetRegisterInfo
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// class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef POWERPC32_REGISTERINFO_H
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#define POWERPC32_REGISTERINFO_H
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#include "PPC.h"
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#include <map>
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#define GET_REGINFO_HEADER
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#include "PPCGenRegisterInfo.inc"
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namespace llvm {
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class PPCSubtarget;
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class TargetInstrInfo;
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class Type;
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class PPCRegisterInfo : public PPCGenRegisterInfo {
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std::map<unsigned, unsigned> ImmToIdxMap;
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const PPCSubtarget &Subtarget;
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const TargetInstrInfo &TII;
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public:
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PPCRegisterInfo(const PPCSubtarget &SubTarget, const TargetInstrInfo &tii);
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/// getPointerRegClass - Return the register class to use to hold pointers.
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/// This is used for addressing modes.
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virtual const TargetRegisterClass *
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getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const;
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unsigned getRegPressureLimit(const TargetRegisterClass *RC,
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MachineFunction &MF) const;
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/// Code Generation virtual methods...
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const uint16_t *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
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const uint32_t *getCallPreservedMask(CallingConv::ID CC) const;
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BitVector getReservedRegs(const MachineFunction &MF) const;
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/// We require the register scavenger.
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bool requiresRegisterScavenging(const MachineFunction &MF) const {
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return true;
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}
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bool requiresFrameIndexScavenging(const MachineFunction &MF) const {
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return true;
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}
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bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const {
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return true;
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}
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void lowerDynamicAlloc(MachineBasicBlock::iterator II,
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int SPAdj, RegScavenger *RS) const;
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void lowerCRSpilling(MachineBasicBlock::iterator II, unsigned FrameIndex,
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int SPAdj, RegScavenger *RS) const;
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void lowerCRRestore(MachineBasicBlock::iterator II, unsigned FrameIndex,
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int SPAdj, RegScavenger *RS) const;
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bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg,
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int &FrameIdx) const;
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void eliminateFrameIndex(MachineBasicBlock::iterator II,
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int SPAdj, unsigned FIOperandNum,
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RegScavenger *RS = NULL) const;
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// Debug information queries.
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unsigned getFrameRegister(const MachineFunction &MF) const;
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// Exception handling queries.
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unsigned getEHExceptionRegister() const;
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unsigned getEHHandlerRegister() const;
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};
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} // end namespace llvm
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#endif
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