mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-27 15:29:51 +00:00
9bc94276e7
Yet another chunk of fast-isel code. This one handles various conversions involving floating-point. (It also includes some miscellaneous handling throughout the back end for LWA_32 and LWAX_32 that should have been part of the load-store patch.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189677 91177308-0d34-0410-b5e6-96231b3b80d8
306 lines
6.6 KiB
LLVM
306 lines
6.6 KiB
LLVM
; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
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; Test sitofp
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define void @sitofp_single_i64(i64 %a, float %b) nounwind ssp {
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entry:
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; ELF64: sitofp_single_i64
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%b.addr = alloca float, align 4
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%conv = sitofp i64 %a to float
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; ELF64: std
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; ELF64: lfd
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; ELF64: fcfids
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store float %conv, float* %b.addr, align 4
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ret void
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}
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define void @sitofp_single_i32(i32 %a, float %b) nounwind ssp {
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entry:
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; ELF64: sitofp_single_i32
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%b.addr = alloca float, align 4
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%conv = sitofp i32 %a to float
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; ELF64: std
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; ELF64: lfiwax
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; ELF64: fcfids
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store float %conv, float* %b.addr, align 4
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ret void
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}
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define void @sitofp_single_i16(i16 %a, float %b) nounwind ssp {
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entry:
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; ELF64: sitofp_single_i16
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%b.addr = alloca float, align 4
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%conv = sitofp i16 %a to float
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; ELF64: extsh
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; ELF64: std
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; ELF64: lfd
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; ELF64: fcfids
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store float %conv, float* %b.addr, align 4
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ret void
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}
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define void @sitofp_single_i8(i8 %a) nounwind ssp {
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entry:
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; ELF64: sitofp_single_i8
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%b.addr = alloca float, align 4
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%conv = sitofp i8 %a to float
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; ELF64: extsb
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; ELF64: std
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; ELF64: lfd
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; ELF64: fcfids
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store float %conv, float* %b.addr, align 4
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ret void
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}
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define void @sitofp_double_i32(i32 %a, double %b) nounwind ssp {
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entry:
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; ELF64: sitofp_double_i32
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%b.addr = alloca double, align 8
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%conv = sitofp i32 %a to double
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; ELF64: std
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; ELF64: lfiwax
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; ELF64: fcfid
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store double %conv, double* %b.addr, align 8
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ret void
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}
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define void @sitofp_double_i64(i64 %a, double %b) nounwind ssp {
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entry:
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; ELF64: sitofp_double_i64
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%b.addr = alloca double, align 8
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%conv = sitofp i64 %a to double
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; ELF64: std
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; ELF64: lfd
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; ELF64: fcfid
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store double %conv, double* %b.addr, align 8
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ret void
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}
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define void @sitofp_double_i16(i16 %a, double %b) nounwind ssp {
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entry:
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; ELF64: sitofp_double_i16
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%b.addr = alloca double, align 8
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%conv = sitofp i16 %a to double
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; ELF64: extsh
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; ELF64: std
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; ELF64: lfd
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; ELF64: fcfid
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store double %conv, double* %b.addr, align 8
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ret void
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}
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define void @sitofp_double_i8(i8 %a, double %b) nounwind ssp {
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entry:
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; ELF64: sitofp_double_i8
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%b.addr = alloca double, align 8
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%conv = sitofp i8 %a to double
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; ELF64: extsb
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; ELF64: std
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; ELF64: lfd
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; ELF64: fcfid
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store double %conv, double* %b.addr, align 8
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ret void
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}
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; Test uitofp
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define void @uitofp_single_i64(i64 %a, float %b) nounwind ssp {
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entry:
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; ELF64: uitofp_single_i64
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%b.addr = alloca float, align 4
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%conv = uitofp i64 %a to float
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; ELF64: std
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; ELF64: lfd
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; ELF64: fcfidus
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store float %conv, float* %b.addr, align 4
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ret void
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}
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define void @uitofp_single_i32(i32 %a, float %b) nounwind ssp {
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entry:
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; ELF64: uitofp_single_i32
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%b.addr = alloca float, align 4
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%conv = uitofp i32 %a to float
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; ELF64: std
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; ELF64: lfiwzx
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; ELF64: fcfidus
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store float %conv, float* %b.addr, align 4
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ret void
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}
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define void @uitofp_single_i16(i16 %a, float %b) nounwind ssp {
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entry:
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; ELF64: uitofp_single_i16
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%b.addr = alloca float, align 4
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%conv = uitofp i16 %a to float
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; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 48
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; ELF64: std
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; ELF64: lfd
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; ELF64: fcfidus
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store float %conv, float* %b.addr, align 4
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ret void
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}
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define void @uitofp_single_i8(i8 %a) nounwind ssp {
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entry:
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; ELF64: uitofp_single_i8
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%b.addr = alloca float, align 4
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%conv = uitofp i8 %a to float
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; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 56
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; ELF64: std
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; ELF64: lfd
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; ELF64: fcfidus
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store float %conv, float* %b.addr, align 4
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ret void
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}
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define void @uitofp_double_i64(i64 %a, double %b) nounwind ssp {
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entry:
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; ELF64: uitofp_double_i64
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%b.addr = alloca double, align 8
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%conv = uitofp i64 %a to double
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; ELF64: std
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; ELF64: lfd
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; ELF64: fcfidu
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store double %conv, double* %b.addr, align 8
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ret void
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}
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define void @uitofp_double_i32(i32 %a, double %b) nounwind ssp {
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entry:
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; ELF64: uitofp_double_i32
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%b.addr = alloca double, align 8
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%conv = uitofp i32 %a to double
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; ELF64: std
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; ELF64: lfiwzx
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; ELF64: fcfidu
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store double %conv, double* %b.addr, align 8
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ret void
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}
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define void @uitofp_double_i16(i16 %a, double %b) nounwind ssp {
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entry:
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; ELF64: uitofp_double_i16
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%b.addr = alloca double, align 8
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%conv = uitofp i16 %a to double
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; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 48
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; ELF64: std
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; ELF64: lfd
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; ELF64: fcfidu
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store double %conv, double* %b.addr, align 8
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ret void
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}
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define void @uitofp_double_i8(i8 %a, double %b) nounwind ssp {
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entry:
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; ELF64: uitofp_double_i8
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%b.addr = alloca double, align 8
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%conv = uitofp i8 %a to double
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; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 56
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; ELF64: std
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; ELF64: lfd
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; ELF64: fcfidu
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store double %conv, double* %b.addr, align 8
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ret void
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}
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; Test fptosi
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define void @fptosi_float_i32(float %a) nounwind ssp {
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entry:
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; ELF64: fptosi_float_i32
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%b.addr = alloca i32, align 4
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%conv = fptosi float %a to i32
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; ELF64: fctiwz
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; ELF64: stfd
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; ELF64: lwa
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store i32 %conv, i32* %b.addr, align 4
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ret void
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}
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define void @fptosi_float_i64(float %a) nounwind ssp {
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entry:
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; ELF64: fptosi_float_i64
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%b.addr = alloca i64, align 4
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%conv = fptosi float %a to i64
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; ELF64: fctidz
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; ELF64: stfd
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; ELF64: ld
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store i64 %conv, i64* %b.addr, align 4
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ret void
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}
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define void @fptosi_double_i32(double %a) nounwind ssp {
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entry:
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; ELF64: fptosi_double_i32
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%b.addr = alloca i32, align 8
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%conv = fptosi double %a to i32
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; ELF64: fctiwz
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; ELF64: stfd
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; ELF64: lwa
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store i32 %conv, i32* %b.addr, align 8
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ret void
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}
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define void @fptosi_double_i64(double %a) nounwind ssp {
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entry:
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; ELF64: fptosi_double_i64
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%b.addr = alloca i64, align 8
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%conv = fptosi double %a to i64
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; ELF64: fctidz
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; ELF64: stfd
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; ELF64: ld
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store i64 %conv, i64* %b.addr, align 8
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ret void
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}
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; Test fptoui
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define void @fptoui_float_i32(float %a) nounwind ssp {
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entry:
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; ELF64: fptoui_float_i32
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%b.addr = alloca i32, align 4
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%conv = fptoui float %a to i32
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; ELF64: fctiwuz
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; ELF64: stfd
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; ELF64: lwz
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store i32 %conv, i32* %b.addr, align 4
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ret void
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}
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define void @fptoui_float_i64(float %a) nounwind ssp {
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entry:
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; ELF64: fptoui_float_i64
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%b.addr = alloca i64, align 4
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%conv = fptoui float %a to i64
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; ELF64: fctiduz
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; ELF64: stfd
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; ELF64: ld
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store i64 %conv, i64* %b.addr, align 4
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ret void
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}
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define void @fptoui_double_i32(double %a) nounwind ssp {
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entry:
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; ELF64: fptoui_double_i32
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%b.addr = alloca i32, align 8
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%conv = fptoui double %a to i32
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; ELF64: fctiwuz
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; ELF64: stfd
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; ELF64: lwz
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store i32 %conv, i32* %b.addr, align 8
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ret void
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}
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define void @fptoui_double_i64(double %a) nounwind ssp {
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entry:
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; ELF64: fptoui_double_i64
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%b.addr = alloca i64, align 8
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%conv = fptoui double %a to i64
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; ELF64: fctiduz
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; ELF64: stfd
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; ELF64: ld
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store i64 %conv, i64* %b.addr, align 8
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ret void
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}
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