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1c8add9978
Summary: This isn't supported directly so we rotate the vector by the desired number of elements, insert to element zero, then rotate back. The i64 case generates rather poor code on MIPS32. There is an obvious optimisation to be made in future (do both insert.w's inside a shared rotate/unrotate sequence) but for now it's sufficient to select valid code instead of aborting. Depends on D3536 Reviewers: matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://reviews.llvm.org/D3537 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207640 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
2r_vector_scalar.ll | ||
2r.ll | ||
2rf_exup.ll | ||
2rf_float_int.ll | ||
2rf_fq.ll | ||
2rf_int_float.ll | ||
2rf_tq.ll | ||
2rf.ll | ||
3r_4r_widen.ll | ||
3r_4r.ll | ||
3r_splat.ll | ||
3r-a.ll | ||
3r-b.ll | ||
3r-c.ll | ||
3r-d.ll | ||
3r-i.ll | ||
3r-m.ll | ||
3r-p.ll | ||
3r-s.ll | ||
3r-v.ll | ||
3rf_4rf_q.ll | ||
3rf_4rf.ll | ||
3rf_exdo.ll | ||
3rf_float_int.ll | ||
3rf_int_float.ll | ||
3rf_q.ll | ||
3rf.ll | ||
arithmetic_float.ll | ||
arithmetic.ll | ||
basic_operations_float.ll | ||
basic_operations.ll | ||
bit.ll | ||
bitcast.ll | ||
bitwise.ll | ||
compare_float.ll | ||
compare.ll | ||
elm_copy.ll | ||
elm_cxcmsa.ll | ||
elm_insv.ll | ||
elm_move.ll | ||
elm_shift_slide.ll | ||
endian.ll | ||
frameindex.ll | ||
i5_ld_st.ll | ||
i5-a.ll | ||
i5-b.ll | ||
i5-c.ll | ||
i5-m.ll | ||
i5-s.ll | ||
i8.ll | ||
i10.ll | ||
inline-asm.ll | ||
llvm-stress-s449609655-simplified.ll | ||
llvm-stress-s525530439.ll | ||
llvm-stress-s997348632.ll | ||
llvm-stress-s1704963983.ll | ||
llvm-stress-s1935737938.ll | ||
llvm-stress-s2090927243-simplified.ll | ||
llvm-stress-s2501752154-simplified.ll | ||
llvm-stress-s2704903805.ll | ||
llvm-stress-s3861334421.ll | ||
llvm-stress-s3926023935.ll | ||
llvm-stress-s3997499501.ll | ||
llvm-stress-sz1-s742806235.ll | ||
shift-dagcombine.ll | ||
shuffle.ll | ||
special.ll | ||
spill.ll | ||
vec.ll | ||
vecs10.ll |