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https://github.com/c64scene-ar/llvm-6502.git
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41454cc88b
With VSX enabled, test/CodeGen/PowerPC/recipest.ll exposes a bug in
the FMA mutation pass. If we have a situation where a killed product
register is the same register as the FMA target, such as:
%vreg5<def,tied1> = XSNMSUBADP %vreg5<tied0>, %vreg11, %vreg5,
%RM<imp-use>; VSFRC:%vreg5 F8RC:%vreg11
then the substitution makes no sense. We end up getting a crash when
we try to extend the interval associated with the killed product
register, as there is already a live range for %vreg5 there. This
patch just disables the mutation under those circumstances.
Since recipest.ll generates different code with VMX enabled, I've
modified that test to use -mattr=-vsx. I've borrowed the code from
that test that exposed the bug and placed it in fma-mutate.ll, where
it tests several mutation opportunities including the "bad" one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220290 91177308-0d34-0410-b5e6-96231b3b80d8
240 lines
4.7 KiB
LLVM
240 lines
4.7 KiB
LLVM
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -enable-unsafe-fp-math -mattr=-vsx | FileCheck %s
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; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck -check-prefix=CHECK-SAFE %s
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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declare double @llvm.sqrt.f64(double)
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declare float @llvm.sqrt.f32(float)
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declare <4 x float> @llvm.sqrt.v4f32(<4 x float>)
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define double @foo(double %a, double %b) nounwind {
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%x = call double @llvm.sqrt.f64(double %b)
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%r = fdiv double %a, %x
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ret double %r
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; CHECK: @foo
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; CHECK-DAG: frsqrte
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; CHECK-DAG: fnmsub
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; CHECK: fmul
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; CHECK-NEXT: fmadd
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; CHECK-NEXT: fmul
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; CHECK-NEXT: fmul
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; CHECK-NEXT: fmadd
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; CHECK-NEXT: fmul
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; CHECK-NEXT: fmul
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; CHECK: blr
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; CHECK-SAFE: @foo
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; CHECK-SAFE: fsqrt
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; CHECK-SAFE: fdiv
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; CHECK-SAFE: blr
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}
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define double @foof(double %a, float %b) nounwind {
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%x = call float @llvm.sqrt.f32(float %b)
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%y = fpext float %x to double
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%r = fdiv double %a, %y
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ret double %r
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; CHECK: @foof
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; CHECK-DAG: frsqrtes
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; CHECK-DAG: fnmsubs
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; CHECK: fmuls
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; CHECK-NEXT: fmadds
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; CHECK-NEXT: fmuls
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; CHECK-NEXT: fmul
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; CHECK-NEXT: blr
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; CHECK-SAFE: @foof
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; CHECK-SAFE: fsqrts
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; CHECK-SAFE: fdiv
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; CHECK-SAFE: blr
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}
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define float @food(float %a, double %b) nounwind {
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%x = call double @llvm.sqrt.f64(double %b)
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%y = fptrunc double %x to float
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%r = fdiv float %a, %y
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ret float %r
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; CHECK: @foo
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; CHECK-DAG: frsqrte
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; CHECK-DAG: fnmsub
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; CHECK: fmul
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; CHECK-NEXT: fmadd
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; CHECK-NEXT: fmul
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; CHECK-NEXT: fmul
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; CHECK-NEXT: fmadd
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; CHECK-NEXT: fmul
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; CHECK-NEXT: frsp
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; CHECK-NEXT: fmuls
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; CHECK-NEXT: blr
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; CHECK-SAFE: @foo
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; CHECK-SAFE: fsqrt
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; CHECK-SAFE: fdivs
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; CHECK-SAFE: blr
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}
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define float @goo(float %a, float %b) nounwind {
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%x = call float @llvm.sqrt.f32(float %b)
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%r = fdiv float %a, %x
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ret float %r
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; CHECK: @goo
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; CHECK-DAG: frsqrtes
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; CHECK-DAG: fnmsubs
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; CHECK: fmuls
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; CHECK-NEXT: fmadds
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; CHECK-NEXT: fmuls
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; CHECK-NEXT: fmuls
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; CHECK-NEXT: blr
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; CHECK-SAFE: @goo
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; CHECK-SAFE: fsqrts
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; CHECK-SAFE: fdivs
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; CHECK-SAFE: blr
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}
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; Recognize that this is rsqrt(a) * rcp(b) * c,
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; not 1 / ( 1 / sqrt(a)) * rcp(b) * c.
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define float @rsqrt_fmul(float %a, float %b, float %c) {
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%x = call float @llvm.sqrt.f32(float %a)
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%y = fmul float %x, %b
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%z = fdiv float %c, %y
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ret float %z
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; CHECK: @rsqrt_fmul
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; CHECK-DAG: frsqrtes
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; CHECK-DAG: fres
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; CHECK-DAG: fnmsubs
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; CHECK-DAG: fmuls
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; CHECK-DAG: fnmsubs
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; CHECK-DAG: fmadds
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; CHECK-DAG: fmadds
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; CHECK: fmuls
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; CHECK-NEXT: fmuls
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; CHECK-NEXT: fmuls
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; CHECK-NEXT: blr
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; CHECK-SAFE: @rsqrt_fmul
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; CHECK-SAFE: fsqrts
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; CHECK-SAFE: fmuls
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; CHECK-SAFE: fdivs
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; CHECK-SAFE: blr
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}
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define <4 x float> @hoo(<4 x float> %a, <4 x float> %b) nounwind {
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%x = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %b)
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%r = fdiv <4 x float> %a, %x
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ret <4 x float> %r
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; CHECK: @hoo
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; CHECK: vrsqrtefp
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; CHECK-SAFE: @hoo
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; CHECK-SAFE-NOT: vrsqrtefp
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; CHECK-SAFE: blr
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}
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define double @foo2(double %a, double %b) nounwind {
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%r = fdiv double %a, %b
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ret double %r
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; CHECK: @foo2
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; CHECK-DAG: fre
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; CHECK-DAG: fnmsub
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; CHECK: fmadd
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; CHECK-NEXT: fnmsub
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; CHECK-NEXT: fmadd
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; CHECK-NEXT: fmul
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; CHECK-NEXT: blr
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; CHECK-SAFE: @foo2
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; CHECK-SAFE: fdiv
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; CHECK-SAFE: blr
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}
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define float @goo2(float %a, float %b) nounwind {
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%r = fdiv float %a, %b
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ret float %r
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; CHECK: @goo2
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; CHECK-DAG: fres
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; CHECK-DAG: fnmsubs
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; CHECK: fmadds
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; CHECK-NEXT: fmuls
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; CHECK-NEXT: blr
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; CHECK-SAFE: @goo2
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; CHECK-SAFE: fdivs
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; CHECK-SAFE: blr
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}
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define <4 x float> @hoo2(<4 x float> %a, <4 x float> %b) nounwind {
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%r = fdiv <4 x float> %a, %b
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ret <4 x float> %r
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; CHECK: @hoo2
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; CHECK: vrefp
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; CHECK-SAFE: @hoo2
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; CHECK-SAFE-NOT: vrefp
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; CHECK-SAFE: blr
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}
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define double @foo3(double %a) nounwind {
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%r = call double @llvm.sqrt.f64(double %a)
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ret double %r
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; CHECK: @foo3
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; CHECK: fcmpu
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; CHECK-DAG: frsqrte
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; CHECK-DAG: fnmsub
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; CHECK: fmul
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; CHECK-NEXT: fmadd
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; CHECK-NEXT: fmul
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; CHECK-NEXT: fmul
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; CHECK-NEXT: fmadd
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; CHECK-NEXT: fmul
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; CHECK-NEXT: fmul
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; CHECK: blr
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; CHECK-SAFE: @foo3
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; CHECK-SAFE: fsqrt
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; CHECK-SAFE: blr
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}
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define float @goo3(float %a) nounwind {
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%r = call float @llvm.sqrt.f32(float %a)
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ret float %r
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; CHECK: @goo3
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; CHECK: fcmpu
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; CHECK-DAG: frsqrtes
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; CHECK-DAG: fnmsubs
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; CHECK: fmuls
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; CHECK-NEXT: fmadds
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; CHECK-NEXT: fmuls
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; CHECK-NEXT: fmuls
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; CHECK: blr
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; CHECK-SAFE: @goo3
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; CHECK-SAFE: fsqrts
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; CHECK-SAFE: blr
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}
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define <4 x float> @hoo3(<4 x float> %a) nounwind {
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%r = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %a)
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ret <4 x float> %r
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; CHECK: @hoo3
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; CHECK: vrsqrtefp
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; CHECK-DAG: vcmpeqfp
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; CHECK-SAFE: @hoo3
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; CHECK-SAFE-NOT: vrsqrtefp
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; CHECK-SAFE: blr
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}
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