Juergen Ributzka 301d3d04f0 [FastISel][AArch64] Teach the address computation code to also fold sign-/zero-extends. ... The code already folds sign-/zero-extends, but only if they are arguments to mul and shift instructions. This extends the code to also fold them when they are direct inputs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219187 91177308-0d34-0410-b5e6-96231b3b80d8		2014-10-07 03:40:06 +00:00
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AArch64	[FastISel][AArch64] Teach the address computation code to also fold sign-/zero-extends.	2014-10-07 03:40:06 +00:00
ARM
CPP
Generic
Hexagon
Inputs
Mips
MSP430
NVPTX
PowerPC
R600
SPARC
SystemZ
Thumb
Thumb2
X86
XCore