Reid Kleckner 28860823ad COFF: Ensure that objects produced by LLVM link with /safeseh ... Summary: We indicate that the object files are safe by emitting a @feat.00 absolute address symbol. The address is presumably interpreted as a bitfield of features that the compiler would like to enable. Bit 0 is documented in the PE COFF spec to opt in to "registered SEH", which is what /safeseh enables. LLVM's object files are safe by default because LLVM doesn't know how to produce SEH handlers. Reviewers: Bigcheese CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D1691 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190898 91177308-0d34-0410-b5e6-96231b3b80d8		2013-09-17 23:18:05 +00:00
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AArch64	Implement 3 AArch64 neon instructions : umov smov ins.	2013-09-17 02:21:02 +00:00
ARM	[ARM] Fix the deprecation of MCR encodings that map to CP15{ISB,DSB,DMB}.	2013-09-17 09:54:57 +00:00
AsmParser	Improve handling of .file, .include and .incbin directives to	2013-09-05 19:14:26 +00:00
COFF	COFF: Ensure that objects produced by LLVM link with /safeseh	2013-09-17 23:18:05 +00:00
Disassembler	Add the remaining Intel SHA instructions	2013-09-14 15:03:21 +00:00
ELF	ELF: Add support for the exclude section bit for gas compat.	2013-09-15 19:53:20 +00:00
MachO	Fixed a crash in the integrated assembler for Mach-O when a symbol difference	2013-09-05 20:25:06 +00:00
Markup
Mips	This patch implements Mips load/store instructions from/to coprocessor 2. Test cases are added.	2013-09-16 10:29:42 +00:00
PowerPC	Implement asm support for a few PowerPC bookIII that are needed for assembling	2013-09-12 17:50:54 +00:00
SystemZ	[SystemZ] Add TM and TMY	2013-09-10 10:20:32 +00:00
X86	Add the remaining Intel SHA instructions	2013-09-14 15:03:21 +00:00