llvm-6502/test/CodeGen
Eli Friedman b4b8b0cc90 Add a target-specific branchless method for double-width relational
comparisons on x86.  Essentially, the way this works is that SUB+SBB sets
the relevant flags the same way a double-width CMP would.

This is a substantial improvement over the generic lowering in LLVM. The output
is also shorter than the gcc-generated output; I haven't done any detailed
benchmarking, though.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127852 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-18 02:34:11 +00:00
..
Alpha
ARM Revert r127757, "Patch to a fix dwarf relocation problem on ARM. One-line fix 2011-03-16 22:16:39 +00:00
Blackfin
CBackend
CellSPU Roll r127459 back in: 2011-03-11 21:52:04 +00:00
CPP
Generic
MBlaze
Mips
MSP430
PowerPC
PTX PTX: Set PTX 2.0 as the minimum supported version 2011-03-15 13:24:15 +00:00
SPARC
SystemZ
Thumb Roll r127459 back in: 2011-03-11 21:52:04 +00:00
Thumb2 Roll r127459 back in: 2011-03-11 21:52:04 +00:00
X86 Add a target-specific branchless method for double-width relational 2011-03-18 02:34:11 +00:00
XCore Add XCore intrinsic for setpsc. 2011-03-17 18:42:05 +00:00