Reid Spencer 3822ff5c71 For PR950: ... This patch converts the old SHR instruction into two instructions, AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not dependent on the sign of their operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31542 91177308-0d34-0410-b5e6-96231b3b80d8		2006-11-08 06:47:33 +00:00
..
ADCE
ArgumentPromotion
BlockPlacement
CodeExtractor
CondProp	Testcase from http://llvm.org/bugs/show_bug.cgi?id=979	2006-11-01 22:25:48 +00:00
ConstantMerge
ConstProp
CorrelatedExprs
DeadArgElim	new testcase	2006-09-18 07:01:39 +00:00
DeadStoreElimination
DecomposeMultiDimRefs
DSAnalysis
FunctionResolve
GCSE
GlobalDCE
GlobalOpt	new testcase that crashes global opt, reduced from chomp	2006-11-01 18:02:53 +00:00
IndVarsSimplify	new testcase	2006-09-21 05:11:01 +00:00
Inline
InstCombine	For PR950:	2006-11-08 06:47:33 +00:00
IPConstantProp
LCSSA	another testcase for PR977	2006-10-31 18:56:24 +00:00
LevelRaise
LICM
LoopSimplify
LoopStrengthReduce
LoopUnroll
LoopUnswitch
LowerInvoke
LowerSetJmp
LowerSwitch
Mem2Reg
PredicateSimplifier	Emitting raw bytecode is awfully rude. Add -disable-output.	2006-10-28 02:34:41 +00:00
PruneEH
RaiseAllocations
Reassociate
ScalarRepl	scalarrepl should not split the two elements of the vsiidx array:	2006-11-07 22:42:29 +00:00
SCCP	new testcase	2006-10-23 18:54:35 +00:00
SimplifyCFG	new testcase	2006-10-29 21:20:56 +00:00
SimplifyLibCalls
TailCallElim
TailDup
.cvsignore