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https://github.com/c64scene-ar/llvm-6502.git
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5b69ebac85
This fixes a very subtle bug. vr defined by an implicit_def is allowed overlap with any register since it doesn't actually modify anything. However, if it's used as a two-address use, its live range can be extended and it can be spilled. The spiller must take care not to emit a reload for the vn number that's defined by the implicit_def. This is both a correctness and performance issue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69743 91177308-0d34-0410-b5e6-96231b3b80d8
341 lines
14 KiB
C++
341 lines
14 KiB
C++
//===-- llvm/CodeGen/Spiller.h - Spiller -*- C++ -*------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_SPILLER_H
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#define LLVM_CODEGEN_SPILLER_H
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/ADT/BitVector.h"
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#include "llvm/ADT/IndexedMap.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/Support/Streams.h"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/LiveIntervalAnalysis.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/ADT/BitVector.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/SmallSet.h"
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#include "VirtRegMap.h"
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#include <map>
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namespace llvm {
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/// Spiller interface: Implementations of this interface assign spilled
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/// virtual registers to stack slots, rewriting the code.
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struct Spiller {
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virtual ~Spiller();
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virtual bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM,
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LiveIntervals* LIs) = 0;
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};
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/// createSpiller - Create an return a spiller object, as specified on the
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/// command line.
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Spiller* createSpiller();
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// ************************************************************************ //
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// Simple Spiller Implementation
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struct VISIBILITY_HIDDEN SimpleSpiller : public Spiller {
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bool runOnMachineFunction(MachineFunction& mf, VirtRegMap &VRM,
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LiveIntervals* LIs);
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};
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// ************************************************************************ //
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/// AvailableSpills - As the local spiller is scanning and rewriting an MBB
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/// from top down, keep track of which spills slots or remat are available in
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/// each register.
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///
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/// Note that not all physregs are created equal here. In particular, some
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/// physregs are reloads that we are allowed to clobber or ignore at any time.
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/// Other physregs are values that the register allocated program is using
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/// that we cannot CHANGE, but we can read if we like. We keep track of this
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/// on a per-stack-slot / remat id basis as the low bit in the value of the
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/// SpillSlotsAvailable entries. The predicate 'canClobberPhysReg()' checks
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/// this bit and addAvailable sets it if.
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class VISIBILITY_HIDDEN AvailableSpills {
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const TargetRegisterInfo *TRI;
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const TargetInstrInfo *TII;
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// SpillSlotsOrReMatsAvailable - This map keeps track of all of the spilled
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// or remat'ed virtual register values that are still available, due to
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// being loaded or stored to, but not invalidated yet.
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std::map<int, unsigned> SpillSlotsOrReMatsAvailable;
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// PhysRegsAvailable - This is the inverse of SpillSlotsOrReMatsAvailable,
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// indicating which stack slot values are currently held by a physreg. This
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// is used to invalidate entries in SpillSlotsOrReMatsAvailable when a
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// physreg is modified.
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std::multimap<unsigned, int> PhysRegsAvailable;
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void disallowClobberPhysRegOnly(unsigned PhysReg);
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void ClobberPhysRegOnly(unsigned PhysReg);
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public:
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AvailableSpills(const TargetRegisterInfo *tri, const TargetInstrInfo *tii)
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: TRI(tri), TII(tii) {
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}
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/// clear - Reset the state.
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void clear() {
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SpillSlotsOrReMatsAvailable.clear();
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PhysRegsAvailable.clear();
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}
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const TargetRegisterInfo *getRegInfo() const { return TRI; }
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/// getSpillSlotOrReMatPhysReg - If the specified stack slot or remat is
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/// available in a physical register, return that PhysReg, otherwise
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/// return 0.
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unsigned getSpillSlotOrReMatPhysReg(int Slot) const {
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std::map<int, unsigned>::const_iterator I =
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SpillSlotsOrReMatsAvailable.find(Slot);
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if (I != SpillSlotsOrReMatsAvailable.end()) {
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return I->second >> 1; // Remove the CanClobber bit.
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}
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return 0;
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}
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/// addAvailable - Mark that the specified stack slot / remat is available
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/// in the specified physreg. If CanClobber is true, the physreg can be
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/// modified at any time without changing the semantics of the program.
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void addAvailable(int SlotOrReMat, unsigned Reg, bool CanClobber = true) {
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// If this stack slot is thought to be available in some other physreg,
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// remove its record.
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ModifyStackSlotOrReMat(SlotOrReMat);
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PhysRegsAvailable.insert(std::make_pair(Reg, SlotOrReMat));
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SpillSlotsOrReMatsAvailable[SlotOrReMat]= (Reg << 1) |
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(unsigned)CanClobber;
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if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT)
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DOUT << "Remembering RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1;
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else
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DOUT << "Remembering SS#" << SlotOrReMat;
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DOUT << " in physreg " << TRI->getName(Reg) << "\n";
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}
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/// canClobberPhysRegForSS - Return true if the spiller is allowed to change
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/// the value of the specified stackslot register if it desires. The
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/// specified stack slot must be available in a physreg for this query to
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/// make sense.
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bool canClobberPhysRegForSS(int SlotOrReMat) const {
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assert(SpillSlotsOrReMatsAvailable.count(SlotOrReMat) &&
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"Value not available!");
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return SpillSlotsOrReMatsAvailable.find(SlotOrReMat)->second & 1;
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}
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/// canClobberPhysReg - Return true if the spiller is allowed to clobber the
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/// physical register where values for some stack slot(s) might be
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/// available.
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bool canClobberPhysReg(unsigned PhysReg) const {
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std::multimap<unsigned, int>::const_iterator I =
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PhysRegsAvailable.lower_bound(PhysReg);
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while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
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int SlotOrReMat = I->second;
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I++;
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if (!canClobberPhysRegForSS(SlotOrReMat))
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return false;
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}
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return true;
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}
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/// disallowClobberPhysReg - Unset the CanClobber bit of the specified
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/// stackslot register. The register is still available but is no longer
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/// allowed to be modifed.
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void disallowClobberPhysReg(unsigned PhysReg);
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/// ClobberPhysReg - This is called when the specified physreg changes
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/// value. We use this to invalidate any info about stuff that lives in
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/// it and any of its aliases.
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void ClobberPhysReg(unsigned PhysReg);
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/// ModifyStackSlotOrReMat - This method is called when the value in a stack
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/// slot changes. This removes information about which register the
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/// previous value for this slot lives in (as the previous value is dead
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/// now).
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void ModifyStackSlotOrReMat(int SlotOrReMat);
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/// AddAvailableRegsToLiveIn - Availability information is being kept coming
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/// into the specified MBB. Add available physical registers as potential
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/// live-in's. If they are reused in the MBB, they will be added to the
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/// live-in set to make register scavenger and post-allocation scheduler.
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void AddAvailableRegsToLiveIn(MachineBasicBlock &MBB, BitVector &RegKills,
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std::vector<MachineOperand*> &KillOps);
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};
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// ************************************************************************ //
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// ReusedOp - For each reused operand, we keep track of a bit of information,
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// in case we need to rollback upon processing a new operand. See comments
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// below.
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struct ReusedOp {
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// The MachineInstr operand that reused an available value.
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unsigned Operand;
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// StackSlotOrReMat - The spill slot or remat id of the value being reused.
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unsigned StackSlotOrReMat;
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// PhysRegReused - The physical register the value was available in.
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unsigned PhysRegReused;
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// AssignedPhysReg - The physreg that was assigned for use by the reload.
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unsigned AssignedPhysReg;
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// VirtReg - The virtual register itself.
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unsigned VirtReg;
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ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr,
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unsigned vreg)
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: Operand(o), StackSlotOrReMat(ss), PhysRegReused(prr),
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AssignedPhysReg(apr), VirtReg(vreg) {}
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};
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/// ReuseInfo - This maintains a collection of ReuseOp's for each operand that
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/// is reused instead of reloaded.
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class VISIBILITY_HIDDEN ReuseInfo {
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MachineInstr &MI;
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std::vector<ReusedOp> Reuses;
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BitVector PhysRegsClobbered;
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public:
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ReuseInfo(MachineInstr &mi, const TargetRegisterInfo *tri) : MI(mi) {
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PhysRegsClobbered.resize(tri->getNumRegs());
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}
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bool hasReuses() const {
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return !Reuses.empty();
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}
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/// addReuse - If we choose to reuse a virtual register that is already
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/// available instead of reloading it, remember that we did so.
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void addReuse(unsigned OpNo, unsigned StackSlotOrReMat,
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unsigned PhysRegReused, unsigned AssignedPhysReg,
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unsigned VirtReg) {
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// If the reload is to the assigned register anyway, no undo will be
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// required.
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if (PhysRegReused == AssignedPhysReg) return;
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// Otherwise, remember this.
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Reuses.push_back(ReusedOp(OpNo, StackSlotOrReMat, PhysRegReused,
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AssignedPhysReg, VirtReg));
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}
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void markClobbered(unsigned PhysReg) {
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PhysRegsClobbered.set(PhysReg);
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}
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bool isClobbered(unsigned PhysReg) const {
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return PhysRegsClobbered.test(PhysReg);
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}
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/// GetRegForReload - We are about to emit a reload into PhysReg. If there
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/// is some other operand that is using the specified register, either pick
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/// a new register to use, or evict the previous reload and use this reg.
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unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
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AvailableSpills &Spills,
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std::vector<MachineInstr*> &MaybeDeadStores,
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SmallSet<unsigned, 8> &Rejected,
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BitVector &RegKills,
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std::vector<MachineOperand*> &KillOps,
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VirtRegMap &VRM);
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/// GetRegForReload - Helper for the above GetRegForReload(). Add a
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/// 'Rejected' set to remember which registers have been considered and
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/// rejected for the reload. This avoids infinite looping in case like
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/// this:
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/// t1 := op t2, t3
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/// t2 <- assigned r0 for use by the reload but ended up reuse r1
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/// t3 <- assigned r1 for use by the reload but ended up reuse r0
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/// t1 <- desires r1
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/// sees r1 is taken by t2, tries t2's reload register r0
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/// sees r0 is taken by t3, tries t3's reload register r1
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/// sees r1 is taken by t2, tries t2's reload register r0 ...
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unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
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AvailableSpills &Spills,
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std::vector<MachineInstr*> &MaybeDeadStores,
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BitVector &RegKills,
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std::vector<MachineOperand*> &KillOps,
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VirtRegMap &VRM) {
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SmallSet<unsigned, 8> Rejected;
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return GetRegForReload(PhysReg, MI, Spills, MaybeDeadStores, Rejected,
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RegKills, KillOps, VRM);
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}
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};
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// ************************************************************************ //
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/// LocalSpiller - This spiller does a simple pass over the machine basic
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/// block to attempt to keep spills in registers as much as possible for
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/// blocks that have low register pressure (the vreg may be spilled due to
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/// register pressure in other blocks).
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class VISIBILITY_HIDDEN LocalSpiller : public Spiller {
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MachineRegisterInfo *RegInfo;
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const TargetRegisterInfo *TRI;
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const TargetInstrInfo *TII;
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BitVector AllocatableRegs;
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DenseMap<MachineInstr*, unsigned> DistanceMap;
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public:
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bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM,
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LiveIntervals* LI);
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private:
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void TransferDeadness(MachineBasicBlock *MBB, unsigned CurDist,
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unsigned Reg, BitVector &RegKills,
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std::vector<MachineOperand*> &KillOps);
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bool OptimizeByUnfold(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &MII,
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std::vector<MachineInstr*> &MaybeDeadStores,
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AvailableSpills &Spills, BitVector &RegKills,
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std::vector<MachineOperand*> &KillOps,
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VirtRegMap &VRM);
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bool OptimizeByUnfold2(unsigned VirtReg, int SS,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &MII,
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std::vector<MachineInstr*> &MaybeDeadStores,
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AvailableSpills &Spills, BitVector &RegKills,
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std::vector<MachineOperand*> &KillOps,
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VirtRegMap &VRM);
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bool CommuteToFoldReload(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &MII,
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unsigned VirtReg, unsigned SrcReg, int SS,
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AvailableSpills &Spills,
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BitVector &RegKills,
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std::vector<MachineOperand*> &KillOps,
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const TargetRegisterInfo *TRI,
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VirtRegMap &VRM);
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void SpillRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &MII,
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int Idx, unsigned PhysReg, int StackSlot,
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const TargetRegisterClass *RC,
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bool isAvailable, MachineInstr *&LastStore,
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AvailableSpills &Spills,
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SmallSet<MachineInstr*, 4> &ReMatDefs,
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BitVector &RegKills,
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std::vector<MachineOperand*> &KillOps,
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VirtRegMap &VRM);
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void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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LiveIntervals *LIs, AvailableSpills &Spills,
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BitVector &RegKills, std::vector<MachineOperand*> &KillOps);
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};
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}
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#endif
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