mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-10-11 23:25:15 +00:00
d950941e13
Generate code for the Blackfin family of DSPs from Analog Devices: http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html We aim to be compatible with the exsisting GNU toolchain found at: http://blackfin.uclinux.org/gf/project/toolchain The back-end is experimental. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77897 91177308-0d34-0410-b5e6-96231b3b80d8
62 lines
2.2 KiB
C++
62 lines
2.2 KiB
C++
//===- BlackfinISelLowering.h - Blackfin DAG Lowering Interface -*- C++ -*-===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This file defines the interfaces that Blackfin uses to lower LLVM code into a
|
|
// selection DAG.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef BLACKFIN_ISELLOWERING_H
|
|
#define BLACKFIN_ISELLOWERING_H
|
|
|
|
#include "llvm/Target/TargetLowering.h"
|
|
#include "Blackfin.h"
|
|
|
|
namespace llvm {
|
|
|
|
namespace BFISD {
|
|
enum {
|
|
FIRST_NUMBER = ISD::BUILTIN_OP_END,
|
|
CALL, // A call instruction.
|
|
RET_FLAG, // Return with a flag operand.
|
|
Wrapper // Address wrapper
|
|
};
|
|
}
|
|
|
|
class BlackfinTargetLowering : public TargetLowering {
|
|
int VarArgsFrameOffset; // Frame offset to start of varargs area.
|
|
public:
|
|
BlackfinTargetLowering(TargetMachine &TM);
|
|
virtual MVT getSetCCResultType(MVT VT) const;
|
|
virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
|
|
|
|
int getVarArgsFrameOffset() const { return VarArgsFrameOffset; }
|
|
|
|
ConstraintType getConstraintType(const std::string &Constraint) const;
|
|
std::pair<unsigned, const TargetRegisterClass*>
|
|
getRegForInlineAsmConstraint(const std::string &Constraint, MVT VT) const;
|
|
std::vector<unsigned>
|
|
getRegClassForInlineAsmConstraint(const std::string &Constraint,
|
|
MVT VT) const;
|
|
virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
|
|
const char *getTargetNodeName(unsigned Opcode) const;
|
|
unsigned getFunctionAlignment(const Function *F) const;
|
|
|
|
private:
|
|
SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
|
|
SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG);
|
|
SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG);
|
|
SDValue LowerRET(SDValue Op, SelectionDAG &DAG);
|
|
SDValue LowerCALL(SDValue Op, SelectionDAG &DAG);
|
|
SDValue LowerADDE(SDValue Op, SelectionDAG &DAG);
|
|
};
|
|
} // end namespace llvm
|
|
|
|
#endif // BLACKFIN_ISELLOWERING_H
|