Tom Stellard 293dfe59a5 R600/SI: Disable subreg liveness ... This is temporary while we try to fix a crash in the register coalescer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228861 91177308-0d34-0410-b5e6-96231b3b80d8		2015-02-11 18:24:53 +00:00
..
AArch64	[SimplifyCFG] Swap to using TargetTransformInfo for cost	2015-02-11 12:15:41 +00:00
ARM	[SimplifyCFG] Swap to using TargetTransformInfo for cost	2015-02-11 12:15:41 +00:00
BPF
CPP
Generic
Hexagon
Inputs
Mips	Fix makeLibCall argument (signed) in SoftenFloatRes_XINT_TO_FP function	2015-02-10 23:30:14 +00:00
MSP430
NVPTX
PowerPC	Fix overly prescriptive test that broken on Mac after r228725.	2015-02-10 20:49:05 +00:00
R600	R600/SI: Disable subreg liveness	2015-02-11 18:24:53 +00:00
SPARC
SystemZ
Thumb
Thumb2	Make buildbots better.	2015-02-11 12:24:09 +00:00
X86	[X86][SSE] Added dual vector truncation tests.	2015-02-11 18:14:35 +00:00
XCore